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07f08d9cee
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
188 lines
3.9 KiB
Plaintext
188 lines
3.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/dts-v1/;
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#include "rk3288-evb.dtsi"
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/ {
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compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";
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vcc_lcd: vcc-lcd {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio7 RK_PA3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_en>;
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regulator-name = "vcc_lcd";
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vin-supply = <&vcc_io>;
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};
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vcc_wl: vcc-wl {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio7 RK_PB1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_pwr>;
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regulator-name = "vcc_wl";
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vin-supply = <&vcc_18>;
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};
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};
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&i2c0 {
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clock-frequency = <400000>;
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vdd_cpu: syr827@40 {
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compatible = "silergy,syr827";
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fcs,suspend-voltage-selector = <1>;
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reg = <0x40>;
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc_sys>;
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};
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vdd_gpu: syr828@41 {
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compatible = "silergy,syr828";
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fcs,suspend-voltage-selector = <1>;
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reg = <0x41>;
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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vin-supply = <&vcc_sys>;
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};
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hym8563@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int>;
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#clock-cells = <0>;
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clock-output-names = "xin32k";
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};
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act8846: act8846@5a {
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compatible = "active-semi,act8846";
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reg = <0x5a>;
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status = "okay";
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vp1-supply = <&vcc_sys>;
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vp2-supply = <&vcc_sys>;
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vp3-supply = <&vcc_sys>;
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vp4-supply = <&vcc_sys>;
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inl1-supply = <&vcc_io>;
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inl2-supply = <&vcc_sys>;
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inl3-supply = <&vcc_20>;
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regulators {
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vcc_ddr: REG1 {
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regulator-name = "VCC_DDR";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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vcc_io: REG2 {
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regulator-name = "VCC_IO";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_log: REG3 {
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regulator-name = "VDD_LOG";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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};
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vcc_20: REG4 {
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regulator-name = "VCC_20";
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regulator-min-microvolt = <2000000>;
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regulator-max-microvolt = <2000000>;
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regulator-always-on;
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};
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vccio_sd: REG5 {
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regulator-name = "VCCIO_SD";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd10_lcd: REG6 {
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regulator-name = "VDD10_LCD";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vcca_codec: REG7 {
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regulator-name = "VCCA_CODEC";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vcc_tp: REG8 {
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regulator-name = "VCCA_TP";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccio_pmu: REG9 {
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regulator-name = "VCCIO_PMU";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_10: REG10 {
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regulator-name = "VDD_10";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vcc_18: REG11 {
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regulator-name = "VCC_18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vcc18_lcd: REG12 {
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regulator-name = "VCC18_LCD";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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};
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};
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};
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&panel {
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power-supply = <&vcc_lcd>;
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};
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&pinctrl {
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lcd {
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lcd_en: lcd-en {
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rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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wifi {
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wifi_pwr: wifi-pwr {
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rockchip,pins = <7 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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