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13efd80aca
Add nodes for GPU (Mali 400) to Exynos4210 and Exynos4412. Describe the GPU as much as possible however still few elements are missing: 1. Exynos4210 bus clock is not described in hardware manual therefore the IP gate clock was provided, 2. Exynos4412: Not sure what to do with CLK_G3D clock responsible for gating entire IP block (it is now being disabled as unused), 3. Regulator supplies on Trats board. Limited testing on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
48 lines
959 B
Plaintext
48 lines
959 B
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung's Exynos4412 Prime SoC device tree source
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*
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* Copyright (c) 2016 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*/
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/*
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* Exynos4412 Prime SoC revision supports higher CPU frequencies than
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* non-Prime version. Therefore we need to update OPPs table and
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* thermal maps accordingly.
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*/
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&cpu0_opp_1500 {
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/delete-property/turbo-mode;
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};
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&cpu0_opp_table {
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opp-1600000000 {
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opp-hz = /bits/ 64 <1600000000>;
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opp-microvolt = <1350000>;
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clock-latency-ns = <200000>;
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};
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opp-1704000000 {
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opp-hz = /bits/ 64 <1704000000>;
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opp-microvolt = <1350000>;
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clock-latency-ns = <200000>;
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};
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};
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&cooling_map0 {
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cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
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<&cpu2 9 9>, <&cpu3 9 9>;
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};
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&cooling_map1 {
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cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,
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<&cpu2 15 15>, <&cpu3 15 15>;
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};
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&gpu_opp_table {
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opp-533000000 {
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opp-hz = /bits/ 64 <533000000>;
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opp-microvolt = <1075000>;
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};
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};
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