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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details the full gnu general public license is included in this distribution in the file called copying this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope [that] it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details the full gnu general public license is included in this distribution in the file called copying extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 57 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.515993066@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
50 lines
1.1 KiB
C
50 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright(c) 2015 EZchip Technologies.
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*/
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#ifndef _PLAT_EZNPS_MTM_H
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#define _PLAT_EZNPS_MTM_H
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#include <plat/ctop.h>
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static inline void *nps_mtm_reg_addr(u32 cpu, u32 reg)
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{
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struct global_id gid;
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u32 core, blkid;
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gid.value = cpu;
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core = gid.core;
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blkid = (((core & 0x0C) << 2) | (core & 0x03));
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return nps_host_reg(cpu, blkid, reg);
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}
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#ifdef CONFIG_EZNPS_MTM_EXT
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#define NPS_CPU_TO_THREAD_NUM(cpu) \
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({ struct global_id gid; gid.value = cpu; gid.thread; })
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/* MTM registers */
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#define MTM_CFG(cpu) nps_mtm_reg_addr(cpu, 0x81)
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#define MTM_THR_INIT(cpu) nps_mtm_reg_addr(cpu, 0x92)
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#define MTM_THR_INIT_STS(cpu) nps_mtm_reg_addr(cpu, 0x93)
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#define get_thread(map) map.thread
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#define eznps_max_cpus 4096
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#define eznps_cpus_per_cluster 256
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void mtm_enable_core(unsigned int cpu);
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int mtm_enable_thread(int cpu);
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#else /* !CONFIG_EZNPS_MTM_EXT */
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#define get_thread(map) 0
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#define eznps_max_cpus 256
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#define eznps_cpus_per_cluster 16
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#define mtm_enable_core(cpu)
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#define mtm_enable_thread(cpu) 1
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#define NPS_CPU_TO_THREAD_NUM(cpu) 0
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#endif /* CONFIG_EZNPS_MTM_EXT */
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#endif /* _PLAT_EZNPS_MTM_H */
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