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94b8beb972
As a preparation for QEMU usage for ARC let's add basic Virtio-MMIO peripherals support for the platform we're going to use. For now we add 5 Virtio slots in .dts and enable block and network devices via Virtio-MMIO. Note even though typically Virtio register set fits in 0x200 bytes we "allocate" here 0x2000 so that it matches ARC's default 8KiB page size and so remapping of that area is done clearly. We also enable DEVTMPFS automount for more convenient use of external root file-stystem. Before that we used to use built-in Initramfs which didn't automount DEVTMPFS anyways so we didn't need that option, while now it starts making sense. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
97 lines
1.8 KiB
Plaintext
97 lines
1.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
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*/
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/dts-v1/;
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/include/ "skeleton_hs.dtsi"
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/ {
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model = "snps,zebu_hs";
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compatible = "snps,zebu_hs";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&core_intc>;
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memory {
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 */
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};
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
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};
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aliases {
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serial0 = &uart0;
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};
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fpga {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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/* child and parent address space 1:1 mapped */
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ranges;
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core_clk: core_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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};
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core_intc: interrupt-controller {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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uart0: serial@f0000000 {
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compatible = "ns8250";
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reg = <0xf0000000 0x2000>;
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interrupts = <24>;
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clock-frequency = <50000000>;
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baud = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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no-loopback-test = <1>;
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};
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arcpct0: pct {
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compatible = "snps,archs-pct";
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#interrupt-cells = <1>;
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interrupts = <20>;
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};
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virtio0: virtio@f0100000 {
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compatible = "virtio,mmio";
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reg = <0xf0100000 0x2000>;
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interrupts = <31>;
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};
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virtio1: virtio@f0102000 {
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compatible = "virtio,mmio";
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reg = <0xf0102000 0x2000>;
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interrupts = <32>;
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};
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virtio2: virtio@f0104000 {
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compatible = "virtio,mmio";
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reg = <0xf0104000 0x2000>;
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interrupts = <33>;
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};
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virtio3: virtio@f0106000 {
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compatible = "virtio,mmio";
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reg = <0xf0106000 0x2000>;
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interrupts = <34>;
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};
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virtio4: virtio@f0108000 {
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compatible = "virtio,mmio";
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reg = <0xf0108000 0x2000>;
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interrupts = <35>;
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};
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};
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};
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