linux-brain/arch/arc/boot/dts/eznps.dts
Thomas Gleixner 4fa9c49f4d treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 291
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details the full gnu general public license is included in
  this distribution in the file called copying

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope [that] it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details the full gnu general public license is included in
  this distribution in the file called copying

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 57 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.515993066@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:38 +02:00

85 lines
1.5 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright(c) 2015 EZchip Technologies.
*/
/dts-v1/;
/ {
compatible = "ezchip,arc-nps";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
present-cpus = "0-1,16-17";
possible-cpus = "0-4095";
aliases {
ethernet0 = &gmac0;
};
chosen {
bootargs = "earlycon=uart8250,mmio32be,0xf7209000,115200n8 console=ttyS0,115200n8";
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512M */
};
clocks {
sysclk: sysclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <83333333>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
/* child and parent address space 1:1 mapped */
ranges;
intc: interrupt-controller {
compatible = "ezchip,nps400-ic";
interrupt-controller;
#interrupt-cells = <1>;
};
timer0: timer_clkevt {
compatible = "snps,arc-timer";
interrupts = <3>;
clocks = <&sysclk>;
};
timer1: timer_clksrc {
compatible = "ezchip,nps400-timer";
clocks = <&sysclk>;
clock-names="sysclk";
};
uart@f7209000 {
compatible = "snps,dw-apb-uart";
device_type = "serial";
reg = <0xf7209000 0x100>;
interrupts = <6>;
clocks = <&sysclk>;
clock-names="baudclk";
baud = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
native-endian;
};
gmac0: ethernet@f7470000 {
compatible = "ezchip,nps-mgt-enet";
reg = <0xf7470000 0x1940>;
interrupts = <7>;
/* Filled in by U-Boot */
mac-address = [ 00 C0 00 F0 04 03 ];
};
};
};