mirror of
https://github.com/brain-hackers/linux-brain.git
synced 2024-06-09 23:36:23 +09:00
356c50079b
- Add a new compatible string for the Armada 3700 SoCs - add sbuscfg support for orion usb controller driver. For the SoCs without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg register to guarantee the AHB master's burst would not overrun or underrun the FIFO. - the sbuscfg register has to be set after the usb controller reset, otherwise the value would be overridden to 0. In order to do this, the reset callback is registered. [gregory.clement@free-electrons.com: - reword commit and comments - fix error path in ehci_orion_drv_reset() - fix checkpatch warning] Signed-off-by: Hua Jing <jinghua@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
23 lines
526 B
Plaintext
23 lines
526 B
Plaintext
* EHCI controller, Orion Marvell variants
|
|
|
|
Required properties:
|
|
- compatible: must be one of the following
|
|
"marvell,orion-ehci"
|
|
"marvell,armada-3700-ehci"
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
region.
|
|
- interrupts: The EHCI interrupt
|
|
|
|
Optional properties:
|
|
- clocks: reference to the clock
|
|
- phys: reference to the USB PHY
|
|
- phy-names: name of the USB PHY, should be "usb"
|
|
|
|
Example:
|
|
|
|
ehci@50000 {
|
|
compatible = "marvell,orion-ehci";
|
|
reg = <0x50000 0x1000>;
|
|
interrupts = <19>;
|
|
};
|