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The g12a audio subsystem, which is a derivative of the axg subsystem, provides a dedicated reset line for each of the audio components. The axg did not provide that and it is unclear if/when these reset are required. The reset already helped solve a channel mapping issue on the tdm formatter devices. Let's add the reset binding for the other components, so we can describe this in DT. We'll use it later on in the driver when/if needed. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20190905120120.31752-3-jbrunet@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
30 lines
868 B
Plaintext
30 lines
868 B
Plaintext
* Amlogic Audio PDM input
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Required properties:
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- compatible: 'amlogic,axg-pdm' or
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'amlogic,g12a-pdm' or
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'amlogic,sm1-pdm'
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- reg: physical base address of the controller and length of memory
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mapped region.
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- clocks: list of clock phandle, one for each entry clock-names.
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- clock-names: should contain the following:
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* "pclk" : peripheral clock.
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* "dclk" : pdm digital clock
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* "sysclk" : dsp system clock
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- #sound-dai-cells: must be 0.
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Optional property:
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- resets: phandle to the dedicated reset line of the pdm input.
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Example of PDM on the A113 SoC:
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pdm: audio-controller@ff632000 {
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compatible = "amlogic,axg-pdm";
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reg = <0x0 0xff632000 0x0 0x34>;
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#sound-dai-cells = <0>;
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clocks = <&clkc_audio AUD_CLKID_PDM>,
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<&clkc_audio AUD_CLKID_PDM_DCLK>,
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<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
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clock-names = "pclk", "dclk", "sysclk";
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};
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