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056c182863
Add gpio interrupt chip support that only support wakeup feature by M4 core. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
58 lines
1.6 KiB
Plaintext
58 lines
1.6 KiB
Plaintext
Device-Tree bindings for drivers/gpio/gpio-imx-rpmsg.c gpio driver over
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rpmsg. On i.mx7ULP PTA PTB are connected on M4 side, so rpmsg gpio driver
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needed to get/set gpio status from M4 side by rpmsg.
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Required properties:
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- compatible : Should be "fsl,imx-rpmsg-gpio".
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- port_idx : Specify the GPIO PORT index, PTA:0, PTB:1.
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- gpio-controller : Mark the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells : Should be 2. The first cell is the GPIO number.
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The second cell bits[3:0] is used to specify trigger type and level flags:
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1 = low-to-high edge triggered.
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2 = high-to-low edge triggered.
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4 = active high level-sensitive.
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8 = active low level-sensitive.
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Note: Each GPIO port should have an alias correctly numbered in "aliases"
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node.
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Examples:
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aliases {
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gpio4 = &rpmsg_gpio0;
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gpio5 = &rpmsg_gpio1;
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};
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rpmsg_gpio0: rpmsg-gpio0 {
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compatible = "fsl,imx-rpmsg-gpio";
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port_idx = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&rpmsg_gpio0>;
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status = "okay";
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};
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rpmsg_gpio1: rpmsg-gpio1 {
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compatible = "fsl,imx-rpmsg-gpio";
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port_idx = <1>;
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gpio-controller;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&rpmsg_gpio1>;
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status = "okay";
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};
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&skeleton_node {
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interrupt-parent = <&rpmsg_gpio1>;
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interrupts = <7 2>;
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wakeup-gpios = <&rpmsg_gpio1 7 GPIO_ACTIVE_LOW>;
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};
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