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3fa9daaccc
commit 1d5558b1f0de81f54ddee05f3793acc5260d107f upstream.
Once driver detects a command interface command timeout, it warns the
user and returns timeout error to the caller. In such case, the entry of
the command is not evacuated (because only real event interrupt is allowed
to clear command interface entry). If the HW event interrupt
of this entry will never arrive, this entry will be left unused forever.
Command interface entries are limited and eventually we can end up without
the ability to post a new command.
In addition, if driver will not consume the EQE of the lost interrupt and
rearm the EQ, no new interrupts will arrive for other commands.
Add a resiliency mechanism for manually polling the command EQ in case of
a command timeout. In case resiliency mechanism will find non-handled EQE,
it will consume it, and the command interface will be fully functional
again. Once the resiliency flow finished, wait another 5 seconds for the
command interface to complete for this command entry.
Define mlx5_cmd_eq_recover() to manage the cmd EQ polling resiliency flow.
Add an async EQ spinlock to avoid races between resiliency flows and real
interrupts that might run simultaneously.
Fixes: e126ba97db ("mlx5: Add driver for Mellanox Connect-IB adapters")
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Cc: Timo Rothenpieler <timo@rothenpieler.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
103 lines
3.2 KiB
C
103 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
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/* Copyright (c) 2018 Mellanox Technologies */
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#ifndef __LIB_MLX5_EQ_H__
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#define __LIB_MLX5_EQ_H__
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#include <linux/mlx5/driver.h>
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#include <linux/mlx5/eq.h>
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#include <linux/mlx5/cq.h>
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#define MLX5_EQE_SIZE (sizeof(struct mlx5_eqe))
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struct mlx5_eq_tasklet {
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struct list_head list;
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struct list_head process_list;
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struct tasklet_struct task;
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spinlock_t lock; /* lock completion tasklet list */
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};
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struct mlx5_cq_table {
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spinlock_t lock; /* protect radix tree */
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struct radix_tree_root tree;
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};
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struct mlx5_eq {
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struct mlx5_core_dev *dev;
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struct mlx5_cq_table cq_table;
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__be32 __iomem *doorbell;
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u32 cons_index;
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struct mlx5_frag_buf buf;
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int size;
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unsigned int vecidx;
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unsigned int irqn;
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u8 eqn;
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int nent;
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struct mlx5_rsc_debug *dbg;
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};
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struct mlx5_eq_async {
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struct mlx5_eq core;
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struct notifier_block irq_nb;
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spinlock_t lock; /* To avoid irq EQ handle races with resiliency flows */
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};
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struct mlx5_eq_comp {
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struct mlx5_eq core;
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struct notifier_block irq_nb;
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struct mlx5_eq_tasklet tasklet_ctx;
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struct list_head list;
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};
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static inline struct mlx5_eqe *get_eqe(struct mlx5_eq *eq, u32 entry)
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{
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return mlx5_buf_offset(&eq->buf, entry * MLX5_EQE_SIZE);
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}
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static inline struct mlx5_eqe *next_eqe_sw(struct mlx5_eq *eq)
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{
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struct mlx5_eqe *eqe = get_eqe(eq, eq->cons_index & (eq->nent - 1));
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return ((eqe->owner & 1) ^ !!(eq->cons_index & eq->nent)) ? NULL : eqe;
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}
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static inline void eq_update_ci(struct mlx5_eq *eq, int arm)
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{
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__be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2);
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u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24);
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__raw_writel((__force u32)cpu_to_be32(val), addr);
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/* We still want ordering, just not swabbing, so add a barrier */
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mb();
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}
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int mlx5_eq_table_init(struct mlx5_core_dev *dev);
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void mlx5_eq_table_cleanup(struct mlx5_core_dev *dev);
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int mlx5_eq_table_create(struct mlx5_core_dev *dev);
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void mlx5_eq_table_destroy(struct mlx5_core_dev *dev);
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int mlx5_eq_add_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq);
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void mlx5_eq_del_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq);
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struct mlx5_eq_comp *mlx5_eqn2comp_eq(struct mlx5_core_dev *dev, int eqn);
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struct mlx5_eq *mlx5_get_async_eq(struct mlx5_core_dev *dev);
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void mlx5_cq_tasklet_cb(unsigned long data);
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struct cpumask *mlx5_eq_comp_cpumask(struct mlx5_core_dev *dev, int ix);
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u32 mlx5_eq_poll_irq_disabled(struct mlx5_eq_comp *eq);
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void mlx5_cmd_eq_recover(struct mlx5_core_dev *dev);
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void mlx5_eq_synchronize_async_irq(struct mlx5_core_dev *dev);
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void mlx5_eq_synchronize_cmd_irq(struct mlx5_core_dev *dev);
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int mlx5_debug_eq_add(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
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void mlx5_debug_eq_remove(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
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void mlx5_eq_debugfs_init(struct mlx5_core_dev *dev);
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void mlx5_eq_debugfs_cleanup(struct mlx5_core_dev *dev);
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/* This function should only be called after mlx5_cmd_force_teardown_hca */
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void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev);
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#ifdef CONFIG_RFS_ACCEL
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struct cpu_rmap *mlx5_eq_table_get_rmap(struct mlx5_core_dev *dev);
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#endif
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#endif
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