211 lines
5.7 KiB
C
211 lines
5.7 KiB
C
/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DAL_IRQ_TYPES_H__
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#define __DAL_IRQ_TYPES_H__
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#include "os_types.h"
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struct dc_context;
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typedef void (*interrupt_handler)(void *);
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typedef void *irq_handler_idx;
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#define DAL_INVALID_IRQ_HANDLER_IDX NULL
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/* The order of the IRQ sources is important and MUST match the one's
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of base driver */
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enum dc_irq_source {
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/* Use as mask to specify invalid irq source */
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DC_IRQ_SOURCE_INVALID = 0,
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DC_IRQ_SOURCE_HPD1,
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DC_IRQ_SOURCE_HPD2,
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DC_IRQ_SOURCE_HPD3,
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DC_IRQ_SOURCE_HPD4,
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DC_IRQ_SOURCE_HPD5,
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DC_IRQ_SOURCE_HPD6,
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DC_IRQ_SOURCE_HPD1RX,
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DC_IRQ_SOURCE_HPD2RX,
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DC_IRQ_SOURCE_HPD3RX,
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DC_IRQ_SOURCE_HPD4RX,
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DC_IRQ_SOURCE_HPD5RX,
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DC_IRQ_SOURCE_HPD6RX,
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DC_IRQ_SOURCE_I2C_DDC1,
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DC_IRQ_SOURCE_I2C_DDC2,
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DC_IRQ_SOURCE_I2C_DDC3,
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DC_IRQ_SOURCE_I2C_DDC4,
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DC_IRQ_SOURCE_I2C_DDC5,
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DC_IRQ_SOURCE_I2C_DDC6,
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DC_IRQ_SOURCE_DPSINK1,
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DC_IRQ_SOURCE_DPSINK2,
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DC_IRQ_SOURCE_DPSINK3,
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DC_IRQ_SOURCE_DPSINK4,
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DC_IRQ_SOURCE_DPSINK5,
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DC_IRQ_SOURCE_DPSINK6,
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DC_IRQ_SOURCE_TIMER,
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DC_IRQ_SOURCE_PFLIP_FIRST,
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DC_IRQ_SOURCE_PFLIP1 = DC_IRQ_SOURCE_PFLIP_FIRST,
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DC_IRQ_SOURCE_PFLIP2,
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DC_IRQ_SOURCE_PFLIP3,
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DC_IRQ_SOURCE_PFLIP4,
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DC_IRQ_SOURCE_PFLIP5,
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DC_IRQ_SOURCE_PFLIP6,
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DC_IRQ_SOURCE_PFLIP_UNDERLAY0,
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DC_IRQ_SOURCE_PFLIP_LAST = DC_IRQ_SOURCE_PFLIP_UNDERLAY0,
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DC_IRQ_SOURCE_GPIOPAD0,
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DC_IRQ_SOURCE_GPIOPAD1,
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DC_IRQ_SOURCE_GPIOPAD2,
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DC_IRQ_SOURCE_GPIOPAD3,
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DC_IRQ_SOURCE_GPIOPAD4,
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DC_IRQ_SOURCE_GPIOPAD5,
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DC_IRQ_SOURCE_GPIOPAD6,
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DC_IRQ_SOURCE_GPIOPAD7,
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DC_IRQ_SOURCE_GPIOPAD8,
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DC_IRQ_SOURCE_GPIOPAD9,
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DC_IRQ_SOURCE_GPIOPAD10,
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DC_IRQ_SOURCE_GPIOPAD11,
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DC_IRQ_SOURCE_GPIOPAD12,
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DC_IRQ_SOURCE_GPIOPAD13,
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DC_IRQ_SOURCE_GPIOPAD14,
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DC_IRQ_SOURCE_GPIOPAD15,
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DC_IRQ_SOURCE_GPIOPAD16,
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DC_IRQ_SOURCE_GPIOPAD17,
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DC_IRQ_SOURCE_GPIOPAD18,
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DC_IRQ_SOURCE_GPIOPAD19,
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DC_IRQ_SOURCE_GPIOPAD20,
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DC_IRQ_SOURCE_GPIOPAD21,
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DC_IRQ_SOURCE_GPIOPAD22,
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DC_IRQ_SOURCE_GPIOPAD23,
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DC_IRQ_SOURCE_GPIOPAD24,
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DC_IRQ_SOURCE_GPIOPAD25,
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DC_IRQ_SOURCE_GPIOPAD26,
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DC_IRQ_SOURCE_GPIOPAD27,
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DC_IRQ_SOURCE_GPIOPAD28,
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DC_IRQ_SOURCE_GPIOPAD29,
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DC_IRQ_SOURCE_GPIOPAD30,
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DC_IRQ_SOURCE_DC1UNDERFLOW,
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DC_IRQ_SOURCE_DC2UNDERFLOW,
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DC_IRQ_SOURCE_DC3UNDERFLOW,
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DC_IRQ_SOURCE_DC4UNDERFLOW,
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DC_IRQ_SOURCE_DC5UNDERFLOW,
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DC_IRQ_SOURCE_DC6UNDERFLOW,
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DC_IRQ_SOURCE_DMCU_SCP,
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DC_IRQ_SOURCE_VBIOS_SW,
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DC_IRQ_SOURCE_VUPDATE1,
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DC_IRQ_SOURCE_VUPDATE2,
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DC_IRQ_SOURCE_VUPDATE3,
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DC_IRQ_SOURCE_VUPDATE4,
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DC_IRQ_SOURCE_VUPDATE5,
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DC_IRQ_SOURCE_VUPDATE6,
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DC_IRQ_SOURCE_VBLANK1,
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DC_IRQ_SOURCE_VBLANK2,
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DC_IRQ_SOURCE_VBLANK3,
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DC_IRQ_SOURCE_VBLANK4,
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DC_IRQ_SOURCE_VBLANK5,
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DC_IRQ_SOURCE_VBLANK6,
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DC_IRQ_SOURCE_DC1_VLINE0,
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DC_IRQ_SOURCE_DC2_VLINE0,
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DC_IRQ_SOURCE_DC3_VLINE0,
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DC_IRQ_SOURCE_DC4_VLINE0,
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DC_IRQ_SOURCE_DC5_VLINE0,
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DC_IRQ_SOURCE_DC6_VLINE0,
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DC_IRQ_SOURCE_DC1_VLINE1,
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DC_IRQ_SOURCE_DC2_VLINE1,
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DC_IRQ_SOURCE_DC3_VLINE1,
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DC_IRQ_SOURCE_DC4_VLINE1,
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DC_IRQ_SOURCE_DC5_VLINE1,
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DC_IRQ_SOURCE_DC6_VLINE1,
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DAL_IRQ_SOURCES_NUMBER
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};
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enum irq_type
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{
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IRQ_TYPE_PFLIP = DC_IRQ_SOURCE_PFLIP1,
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IRQ_TYPE_VUPDATE = DC_IRQ_SOURCE_VUPDATE1,
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IRQ_TYPE_VBLANK = DC_IRQ_SOURCE_VBLANK1,
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};
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#define DAL_VALID_IRQ_SRC_NUM(src) \
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((src) < DAL_IRQ_SOURCES_NUMBER && (src) > DC_IRQ_SOURCE_INVALID)
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/* Number of Page Flip IRQ Sources. */
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#define DAL_PFLIP_IRQ_SRC_NUM \
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(DC_IRQ_SOURCE_PFLIP_LAST - DC_IRQ_SOURCE_PFLIP_FIRST + 1)
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/* the number of contexts may be expanded in the future based on needs */
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enum dc_interrupt_context {
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INTERRUPT_LOW_IRQ_CONTEXT = 0,
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INTERRUPT_HIGH_IRQ_CONTEXT,
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INTERRUPT_CONTEXT_NUMBER
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};
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enum dc_interrupt_porlarity {
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INTERRUPT_POLARITY_DEFAULT = 0,
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INTERRUPT_POLARITY_LOW = INTERRUPT_POLARITY_DEFAULT,
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INTERRUPT_POLARITY_HIGH,
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INTERRUPT_POLARITY_BOTH
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};
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#define DC_DECODE_INTERRUPT_POLARITY(int_polarity) \
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(int_polarity == INTERRUPT_POLARITY_LOW) ? "Low" : \
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(int_polarity == INTERRUPT_POLARITY_HIGH) ? "High" : \
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(int_polarity == INTERRUPT_POLARITY_BOTH) ? "Both" : "Invalid"
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struct dc_timer_interrupt_params {
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uint32_t micro_sec_interval;
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enum dc_interrupt_context int_context;
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};
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struct dc_interrupt_params {
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/* The polarity *change* which will trigger an interrupt.
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* If 'requested_polarity == INTERRUPT_POLARITY_BOTH', then
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* 'current_polarity' must be initialised. */
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enum dc_interrupt_porlarity requested_polarity;
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/* If 'requested_polarity == INTERRUPT_POLARITY_BOTH',
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* 'current_polarity' should contain the current state, which means
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* the interrupt will be triggered when state changes from what is,
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* in 'current_polarity'. */
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enum dc_interrupt_porlarity current_polarity;
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enum dc_irq_source irq_source;
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enum dc_interrupt_context int_context;
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};
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#endif
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