linux-brain/arch/openrisc
Peter Zijlstra a103713429 openrisc: Define memory barrier mb
[ Upstream commit 8b549c18ae81dbc36fb11e4aa08b8378c599ca95 ]

This came up in the discussion of the requirements of qspinlock on an
architecture.  OpenRISC uses qspinlock, but it was noticed that the
memmory barrier was not defined.

Peter defined it in the mail thread writing:

    As near as I can tell this should do. The arch spec only lists
    this one instruction and the text makes it sound like a completion
    barrier.

This is correct so applying this patch.

Signed-off-by: Peter Zijlstra <peterz@infradead.org>
[shorne@gmail.com:Turned the mail into a patch]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-06-03 08:59:11 +02:00
..
boot/dts or1k: dts: Add ethoc device to SMP devicetree 2019-08-31 11:56:19 +09:00
configs configs: get rid of obsolete CONFIG_ENABLE_WARN_DEPRECATED 2019-03-07 18:32:02 -08:00
include openrisc: Define memory barrier mb 2021-06-03 08:59:11 +02:00
kernel openrisc: Fix a memory leak 2021-05-26 12:05:14 +02:00
lib treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
mm openrisc: Fix cache API compile issue when not inlining 2020-09-23 12:40:36 +02:00
Kconfig docs: kbuild: convert docs to ReST and rename to *.rst 2019-06-14 14:21:21 -06:00
Kconfig.debug treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
Makefile openrisc: remove unneeded code in arch/openrisc/Makefile 2019-01-17 23:42:59 +09:00