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d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
87 lines
1.9 KiB
ArmAsm
87 lines
1.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* linux/arch/unicore32/kernel/debug-macro.S
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2010 GUAN Xue-tao
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*
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* Debugging macro include header
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*/
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#include <generated/asm-offsets.h>
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#include <mach/hardware.h>
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.macro put_word_ocd, rd, rx=r16
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1001: movc \rx, p1.c0, #0
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cand.a \rx, #2
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bne 1001b
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movc p1.c1, \rd, #1
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.endm
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#ifdef CONFIG_DEBUG_OCD
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/* debug using UniCore On-Chip-Debugger */
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.macro addruart, rx
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.endm
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.macro senduart, rd, rx
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put_word_ocd \rd, \rx
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.endm
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.macro busyuart, rd, rx
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.endm
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.macro waituart, rd, rx
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.endm
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#else
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#define UART_CLK_DEFAULT 3686400 * 20
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/* Uartclk = MCLK/ 2, The MCLK on my board is 3686400 * 40 */
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#define BAUD_RATE_DEFAULT 115200
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/* The baud rate of the serial port */
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#define UART_DIVISOR_DEFAULT (UART_CLK_DEFAULT \
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/ (16 * BAUD_RATE_DEFAULT) - 1)
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.macro addruart,rx
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mrc p0, #0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0xee000000 @ physical base address
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movne \rx, #0x6e000000 @ virtual address
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@ We probe for the active serial port here
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@ However, now we assume UART0 is active: epip4d
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@ We assume r1 and r2 can be clobbered.
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movl r2, #UART_DIVISOR_DEFAULT
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mov r1, #0x80
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str r1, [\rx, #UART_LCR_OFFSET]
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and r1, r2, #0xff00
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mov r1, r1, lsr #8
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str r1, [\rx, #UART_DLH_OFFSET]
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and r1, r2, #0xff
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str r1, [\rx, #UART_DLL_OFFSET]
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mov r1, #0x7
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str r1, [\rx, #UART_FCR_OFFSET]
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mov r1, #0x3
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str r1, [\rx, #UART_LCR_OFFSET]
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mov r1, #0x0
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str r1, [\rx, #UART_IER_OFFSET]
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.endm
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.macro senduart,rd,rx
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str \rd, [\rx, #UART_THR_OFFSET]
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.endm
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.macro waituart,rd,rx
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1001: ldr \rd, [\rx, #UART_LSR_OFFSET]
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tst \rd, #UART_LSR_THRE
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beq 1001b
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.endm
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.macro busyuart,rd,rx
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1001: ldr \rd, [\rx, #UART_LSR_OFFSET]
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tst \rd, #UART_LSR_TEMT
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bne 1001b
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.endm
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#endif
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