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2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
84 lines
2.0 KiB
ArmAsm
84 lines
2.0 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* This file contains the power_save function for 970-family CPUs.
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*/
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#include <linux/threads.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/cputable.h>
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#include <asm/thread_info.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/irqflags.h>
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#include <asm/hw_irq.h>
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#include <asm/feature-fixups.h>
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#undef DEBUG
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.text
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_GLOBAL(power4_idle)
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BEGIN_FTR_SECTION
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blr
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END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
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/* Now check if user or arch enabled NAP mode */
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LOAD_REG_ADDRBASE(r3,powersave_nap)
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lwz r4,ADDROFF(powersave_nap)(r3)
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cmpwi 0,r4,0
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beqlr
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/* This sequence is similar to prep_irq_for_idle() */
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/* Hard disable interrupts */
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mfmsr r7
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rldicl r0,r7,48,1
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rotldi r0,r0,16
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mtmsrd r0,1
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/* Check if something happened while soft-disabled */
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lbz r0,PACAIRQHAPPENED(r13)
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cmpwi cr0,r0,0
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bne- 2f
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/*
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* Soft-enable interrupts. This will make power4_fixup_nap return
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* to our caller with interrupts enabled (soft and hard). The caller
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* can cope with either interrupts disabled or enabled upon return.
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*/
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#ifdef CONFIG_TRACE_IRQFLAGS
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/* Tell the tracer interrupts are on, because idle responds to them. */
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mflr r0
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std r0,16(r1)
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stdu r1,-128(r1)
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bl trace_hardirqs_on
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addi r1,r1,128
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ld r0,16(r1)
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mtlr r0
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mfmsr r7
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#endif /* CONFIG_TRACE_IRQFLAGS */
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li r0,IRQS_ENABLED
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stb r0,PACAIRQSOFTMASK(r13) /* we'll hard-enable shortly */
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BEGIN_FTR_SECTION
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DSSALL
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sync
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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ld r9, PACA_THREAD_INFO(r13)
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ld r8,TI_LOCAL_FLAGS(r9) /* set napping bit */
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ori r8,r8,_TLF_NAPPING /* so when we take an exception */
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std r8,TI_LOCAL_FLAGS(r9) /* it will return to our caller */
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ori r7,r7,MSR_EE
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oris r7,r7,MSR_POW@h
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1: sync
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isync
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mtmsrd r7
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isync
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b 1b
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2: /* Return if an interrupt had happened while soft disabled */
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/* Set the HARD_DIS flag because interrupts are now hard disabled */
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ori r0,r0,PACA_IRQ_HARD_DIS
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stb r0,PACAIRQHAPPENED(r13)
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blr
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