linux-brain/arch/mips/sgi-ip27/Kconfig
Thomas Bogendoerfer 6373467482
MIPS: SGI-IP27: fix exception handler replication
Commit 775b089aef ("MIPS: tlbex: Remove cpu_has_local_ebase") removed
generating tlb refill handlers for every CPU, which was needed for
generating per node exception handlers on IP27. Instead of resurrecting
(and fixing) refill handler generation, we simply copy all exception
vectors from the boot node to the other nodes. Also remove the config
option since the memory tradeoff for expection handler replication
is just 8k per node.

Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
2019-10-31 15:19:59 -07:00

41 lines
1.2 KiB
Plaintext

# SPDX-License-Identifier: GPL-2.0
choice
prompt "Node addressing mode"
depends on SGI_IP27
default SGI_SN_M_MODE
config SGI_SN_M_MODE
bool "IP27 M-Mode"
help
The nodes of Origin, Onyx, Fuel and Tezro systems can be configured
in either N-Modes which allows for more nodes or M-Mode which allows
for more memory. Your hardware is almost certainly running in
M-Mode, so choose M-mode here.
config SGI_SN_N_MODE
bool "IP27 N-Mode"
help
The nodes of Origin, Onyx, Fuel and Tezro systems can be configured
in either N-Modes which allows for more nodes or M-Mode which allows
for more memory. Your hardware is almost certainly running in
M-Mode, so choose M-mode here.
endchoice
config MAPPED_KERNEL
bool "Mapped kernel support"
depends on SGI_IP27
help
Change the way a Linux kernel is loaded into memory on a MIPS64
machine. This is required in order to support text replication on
NUMA. If you need to understand it, read the source code.
config REPLICATE_KTEXT
bool "Kernel text replication support"
depends on SGI_IP27
select MAPPED_KERNEL
help
Say Y here to enable replicating the kernel text across multiple
nodes in a NUMA cluster. This trades memory for speed.