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08dbd0f8ef
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 and only version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin street fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 94 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141334.043630402@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
80 lines
1.8 KiB
C
80 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* DMA implementation for Hexagon
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*
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* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
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*/
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#include <linux/dma-noncoherent.h>
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#include <linux/memblock.h>
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#include <linux/genalloc.h>
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#include <linux/module.h>
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#include <asm/page.h>
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static struct gen_pool *coherent_pool;
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/* Allocates from a pool of uncached memory that was reserved at boot time */
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_addr,
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gfp_t flag, unsigned long attrs)
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{
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void *ret;
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/*
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* Our max_low_pfn should have been backed off by 16MB in
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* mm/init.c to create DMA coherent space. Use that as the VA
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* for the pool.
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*/
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if (coherent_pool == NULL) {
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coherent_pool = gen_pool_create(PAGE_SHIFT, -1);
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if (coherent_pool == NULL)
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panic("Can't create %s() memory pool!", __func__);
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else
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gen_pool_add(coherent_pool,
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(unsigned long)pfn_to_virt(max_low_pfn),
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hexagon_coherent_pool_size, -1);
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}
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ret = (void *) gen_pool_alloc(coherent_pool, size);
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if (ret) {
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memset(ret, 0, size);
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*dma_addr = (dma_addr_t) virt_to_phys(ret);
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} else
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*dma_addr = ~0;
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return ret;
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}
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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gen_pool_free(coherent_pool, (unsigned long) vaddr, size);
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}
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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void *addr = phys_to_virt(paddr);
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switch (dir) {
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case DMA_TO_DEVICE:
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hexagon_clean_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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case DMA_FROM_DEVICE:
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hexagon_inv_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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case DMA_BIDIRECTIONAL:
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flush_dcache_range((unsigned long) addr,
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(unsigned long) addr + size);
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break;
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default:
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BUG();
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}
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}
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