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https://github.com/brain-hackers/linux-brain.git
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e907a0d09b
[ Upstream commit aefd9461d34a1b0a2acad0750c43216c1c27b9d4 ] For the memory size ( > 512MB, < 1GB), the MSA setting is: - SSEG0: PHY_START , PHY_START + 512MB - SSEG1: PHY_START + 512MB, PHY_START + 1GB But the real memory is no more than 1GB, there is a gap between the end size of memory and border of 1GB. CPU could speculatively execute to that gap and if the gap of the bus couldn't respond to the CPU request, then the crash will happen. Now make the setting with: - SSEG0: PHY_START , PHY_START + 512MB (no change) - SSEG1: Disabled (We use highmem to use the memory of 512MB~1GB) We also deprecated zhole_szie[] settings, it's only used by arm style CPUs. All memory gap should use Reserved setting of dts in csky system. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
133 lines
2.9 KiB
C
133 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/console.h>
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#include <linux/memblock.h>
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#include <linux/initrd.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/start_kernel.h>
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#include <linux/dma-contiguous.h>
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#include <linux/screen_info.h>
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#include <asm/sections.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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#ifdef CONFIG_DUMMY_CONSOLE
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struct screen_info screen_info = {
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.orig_video_lines = 30,
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.orig_video_cols = 80,
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.orig_video_mode = 0,
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.orig_video_ega_bx = 0,
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.orig_video_isVGA = 1,
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.orig_video_points = 8
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};
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#endif
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static void __init csky_memblock_init(void)
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{
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unsigned long zone_size[MAX_NR_ZONES];
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signed long size;
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memblock_reserve(__pa(_stext), _end - _stext);
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#ifdef CONFIG_BLK_DEV_INITRD
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memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
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#endif
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early_init_fdt_reserve_self();
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early_init_fdt_scan_reserved_mem();
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memblock_dump_all();
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memset(zone_size, 0, sizeof(zone_size));
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min_low_pfn = PFN_UP(memblock_start_of_DRAM());
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max_low_pfn = max_pfn = PFN_DOWN(memblock_end_of_DRAM());
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size = max_pfn - min_low_pfn;
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if (size <= PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET))
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zone_size[ZONE_NORMAL] = size;
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else if (size < PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET)) {
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zone_size[ZONE_NORMAL] =
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PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET);
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max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
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} else {
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zone_size[ZONE_NORMAL] =
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PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET);
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max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
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write_mmu_msa1(read_mmu_msa0() + SSEG_SIZE);
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}
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#ifdef CONFIG_HIGHMEM
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zone_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn;
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highstart_pfn = max_low_pfn;
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highend_pfn = max_pfn;
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#endif
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memblock_set_current_limit(PFN_PHYS(max_low_pfn));
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dma_contiguous_reserve(0);
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free_area_init_node(0, zone_size, min_low_pfn, NULL);
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}
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void __init setup_arch(char **cmdline_p)
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{
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*cmdline_p = boot_command_line;
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console_verbose();
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pr_info("Phys. mem: %ldMB\n",
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(unsigned long) memblock_phys_mem_size()/1024/1024);
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init_mm.start_code = (unsigned long) _stext;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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init_mm.brk = (unsigned long) _end;
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parse_early_param();
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csky_memblock_init();
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unflatten_and_copy_device_tree();
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#ifdef CONFIG_SMP
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setup_smp();
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#endif
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sparse_init();
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#ifdef CONFIG_HIGHMEM
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kmap_init();
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#endif
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#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
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conswitchp = &dummy_con;
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#endif
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}
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unsigned long va_pa_offset;
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EXPORT_SYMBOL(va_pa_offset);
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asmlinkage __visible void __init csky_start(unsigned int unused,
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void *dtb_start)
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{
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/* Clean up bss section */
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memset(__bss_start, 0, __bss_stop - __bss_start);
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va_pa_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1);
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pre_trap_init();
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pre_mmu_init();
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if (dtb_start == NULL)
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early_init_dt_scan(__dtb_start);
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else
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early_init_dt_scan(dtb_start);
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start_kernel();
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asm volatile("br .\n");
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}
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