mirror of
https://github.com/brain-hackers/linux-brain.git
synced 2024-06-09 23:36:23 +09:00
cf911ee9f4
[ Upstream commit 4601832f40501efc3c2fd264a5a69bd1ac17d520 ]
The IPU1 MMU has been using common IOMMU pdata quirks defined and
used by all IPU IOMMU devices on OMAP4 and beyond. Separate out the
pdata for IPU1 MMU with the additional .set_pwrdm_constraint ops
plugged in, so that the IPU1 power domain can be restricted to ON
state during the boot and active period of the IPU1 remote processor.
This eliminates the pre-conditions for the IPU1 boot issue as
described in commit afe518400bdb ("iommu/omap: fix boot issue on
remoteprocs with AMMU/Unicache").
NOTE:
1. RET is not a valid target power domain state on DRA7 platforms,
and IPU power domain is normally programmed for OFF. The IPU1
still fails to boot though, and an unclearable l3_noc error is
thrown currently on 4.14 kernel without this fix. This behavior
is slightly different from previous 4.9 LTS kernel.
2. The fix is currently applied only to IPU1 on DRA7xx SoC, as the
other affected processors on OMAP4/OMAP5/DRA7 are in domains
that are not entering RET. IPU2 on DRA7 is in CORE power domain
which is only programmed for ON power state. The fix can be easily
scaled if these domains do hit RET in the future.
3. The issue was not seen on current DRA7 platforms if any of the
DSP remote processors were booted and using one of the GPTimers
5, 6, 7 or 8 on previous 4.9 LTS kernel. This was due to the
errata fix for i874 implemented in commit 1cbabcb980 ("ARM:
DRA7: clockdomain: Implement timer workaround for errata i874")
which keeps the IPU1 power domain from entering RET when the
timers are active. But the timer workaround did not make any
difference on 4.14 kernel, and an l3_noc error was seen still
without this fix.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
636 lines
17 KiB
C
636 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Legacy platform_data quirks
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*
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* Copyright (C) 2013 Texas Instruments
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*/
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#include <linux/clk.h>
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#include <linux/davinci_emac.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <linux/ti_wilink_st.h>
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#include <linux/wl12xx.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <linux/power/smartreflex.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <linux/platform_data/pinctrl-single.h>
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#include <linux/platform_data/hsmmc-omap.h>
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#include <linux/platform_data/iommu-omap.h>
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#include <linux/platform_data/ti-sysc.h>
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#include <linux/platform_data/wkup_m3.h>
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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#include "clockdomain.h"
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#include "common.h"
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#include "common-board-devices.h"
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#include "control.h"
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#include "omap_device.h"
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#include "omap-secure.h"
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#include "soc.h"
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#include "hsmmc.h"
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static struct omap_hsmmc_platform_data __maybe_unused mmc_pdata[2];
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struct pdata_init {
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const char *compatible;
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void (*fn)(void);
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};
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static struct of_dev_auxdata omap_auxdata_lookup[];
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static struct twl4030_gpio_platform_data twl_gpio_auxdata;
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#if IS_ENABLED(CONFIG_OMAP_IOMMU)
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int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
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u8 *pwrst);
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#else
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static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
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bool request, u8 *pwrst)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_MACH_NOKIA_N8X0
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static void __init omap2420_n8x0_legacy_init(void)
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{
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omap_auxdata_lookup[0].platform_data = n8x0_legacy_init();
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}
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#else
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#define omap2420_n8x0_legacy_init NULL
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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/*
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* Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V
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* mode for MMC1 in case bootloader did not configure things.
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* Note that if the pins are used for MMC1, pbias-regulator
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* manages the IO voltage.
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*/
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static void __init omap3_gpio126_127_129(void)
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{
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u32 reg;
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reg = omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE);
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reg &= ~OMAP343X_PBIASLITEVMODE1;
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reg |= OMAP343X_PBIASLITEPWRDNZ1;
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omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE);
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if (cpu_is_omap3630()) {
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reg = omap_ctrl_readl(OMAP34XX_CONTROL_WKUP_CTRL);
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reg |= OMAP36XX_GPIO_IO_PWRDNZ;
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omap_ctrl_writel(reg, OMAP34XX_CONTROL_WKUP_CTRL);
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}
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}
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static void __init hsmmc2_internal_input_clk(void)
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{
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u32 reg;
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reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1);
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reg |= OMAP2_MMCSDIO2ADPCLKISEL;
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omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1);
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}
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static struct iommu_platform_data omap3_iommu_pdata = {
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.reset_name = "mmu",
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.assert_reset = omap_device_assert_hardreset,
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.deassert_reset = omap_device_deassert_hardreset,
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.device_enable = omap_device_enable,
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.device_idle = omap_device_idle,
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};
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static struct iommu_platform_data omap3_iommu_isp_pdata = {
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.device_enable = omap_device_enable,
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.device_idle = omap_device_idle,
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};
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static int omap3_sbc_t3730_twl_callback(struct device *dev,
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unsigned gpio,
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unsigned ngpio)
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{
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int res;
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res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
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"wlan pwr");
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if (res)
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return res;
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gpio_export(gpio, 0);
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return 0;
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}
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static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
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{
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int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
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if (err) {
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pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
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hub_name, err);
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return;
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}
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gpio_export(gpio, 0);
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udelay(10);
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gpio_set_value(gpio, 1);
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msleep(1);
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}
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static void __init omap3_sbc_t3730_twl_init(void)
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{
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twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
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}
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static void __init omap3_sbc_t3730_legacy_init(void)
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{
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omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
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}
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static void __init omap3_sbc_t3530_legacy_init(void)
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{
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omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
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}
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static struct ti_st_plat_data wilink_pdata = {
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.nshutdown_gpio = 137,
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.dev_name = "/dev/ttyO1",
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.flow_cntrl = 1,
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.baud_rate = 300000,
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};
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static struct platform_device wl18xx_device = {
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.name = "kim",
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.id = -1,
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.dev = {
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.platform_data = &wilink_pdata,
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}
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};
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static struct ti_st_plat_data wilink7_pdata = {
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.nshutdown_gpio = 162,
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.dev_name = "/dev/ttyO1",
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.flow_cntrl = 1,
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.baud_rate = 3000000,
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};
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static struct platform_device wl128x_device = {
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.name = "kim",
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.id = -1,
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.dev = {
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.platform_data = &wilink7_pdata,
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}
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};
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static struct platform_device btwilink_device = {
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.name = "btwilink",
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.id = -1,
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};
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static void __init omap3_igep0020_rev_f_legacy_init(void)
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{
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platform_device_register(&wl18xx_device);
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platform_device_register(&btwilink_device);
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}
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static void __init omap3_igep0030_rev_g_legacy_init(void)
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{
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platform_device_register(&wl18xx_device);
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platform_device_register(&btwilink_device);
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}
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static void __init omap3_evm_legacy_init(void)
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{
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hsmmc2_internal_input_clk();
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}
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static void am35xx_enable_emac_int(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
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AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
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omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
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omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
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}
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static void am35xx_disable_emac_int(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
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omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
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omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
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}
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static struct emac_platform_data am35xx_emac_pdata = {
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.interrupt_enable = am35xx_enable_emac_int,
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.interrupt_disable = am35xx_disable_emac_int,
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};
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static void __init am35xx_emac_reset(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
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v &= ~AM35XX_CPGMACSS_SW_RST;
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omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
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omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
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}
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static struct gpio cm_t3517_wlan_gpios[] __initdata = {
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{ 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
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{ 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
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};
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static void __init omap3_sbc_t3517_wifi_init(void)
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{
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int err = gpio_request_array(cm_t3517_wlan_gpios,
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ARRAY_SIZE(cm_t3517_wlan_gpios));
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if (err) {
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pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
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return;
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}
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gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
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gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
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msleep(100);
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gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
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}
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static void __init omap3_sbc_t3517_legacy_init(void)
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{
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omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
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omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
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am35xx_emac_reset();
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hsmmc2_internal_input_clk();
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omap3_sbc_t3517_wifi_init();
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}
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static void __init am3517_evm_legacy_init(void)
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{
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am35xx_emac_reset();
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}
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static void __init nokia_n900_legacy_init(void)
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{
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hsmmc2_internal_input_clk();
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mmc_pdata[0].name = "external";
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mmc_pdata[1].name = "internal";
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if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
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if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
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pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
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/* set IBE to 1 */
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rx51_secure_update_aux_cr(BIT(6), 0);
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} else {
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pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n");
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pr_warn("Thumb binaries may crash randomly without this workaround\n");
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}
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}
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}
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static void __init omap3_tao3530_legacy_init(void)
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{
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hsmmc2_internal_input_clk();
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}
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static void __init omap3_logicpd_torpedo_init(void)
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{
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omap3_gpio126_127_129();
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platform_device_register(&wl128x_device);
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platform_device_register(&btwilink_device);
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}
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/* omap3pandora legacy devices */
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static struct platform_device pandora_backlight = {
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.name = "pandora-backlight",
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.id = -1,
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};
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static void __init omap3_pandora_legacy_init(void)
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{
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platform_device_register(&pandora_backlight);
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}
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#endif /* CONFIG_ARCH_OMAP3 */
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#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
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static struct wkup_m3_platform_data wkup_m3_data = {
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.reset_name = "wkup_m3",
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.assert_reset = omap_device_assert_hardreset,
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.deassert_reset = omap_device_deassert_hardreset,
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};
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#endif
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#ifdef CONFIG_SOC_OMAP5
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static void __init omap5_uevm_legacy_init(void)
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{
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}
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#endif
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#ifdef CONFIG_SOC_DRA7XX
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static struct iommu_platform_data dra7_ipu1_dsp_iommu_pdata = {
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.set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint,
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};
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
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static void __init dra7x_evm_mmc_quirk(void)
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{
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if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
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dra7_hsmmc_data_mmc1.version = "rev11";
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dra7_hsmmc_data_mmc1.max_freq = 96000000;
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dra7_hsmmc_data_mmc2.version = "rev11";
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dra7_hsmmc_data_mmc2.max_freq = 48000000;
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dra7_hsmmc_data_mmc3.version = "rev11";
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dra7_hsmmc_data_mmc3.max_freq = 48000000;
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}
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}
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#endif
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static struct clockdomain *ti_sysc_find_one_clockdomain(struct clk *clk)
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{
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struct clk_hw *hw = __clk_get_hw(clk);
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struct clockdomain *clkdm = NULL;
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struct clk_hw_omap *hwclk;
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hwclk = to_clk_hw_omap(hw);
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if (!omap2_clk_is_hw_omap(hw))
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return NULL;
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if (hwclk && hwclk->clkdm_name)
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clkdm = clkdm_lookup(hwclk->clkdm_name);
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return clkdm;
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}
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/**
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* ti_sysc_clkdm_init - find clockdomain based on clock
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* @fck: device functional clock
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* @ick: device interface clock
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* @dev: struct device
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*
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* Populate clockdomain based on clock. It is needed for
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* clkdm_deny_idle() and clkdm_allow_idle() for blocking clockdomain
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* clockdomain idle during reset, enable and idle.
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*
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* Note that we assume interconnect driver manages the clocks
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* and do not need to populate oh->_clk for dynamically
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* allocated modules.
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*/
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static int ti_sysc_clkdm_init(struct device *dev,
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struct clk *fck, struct clk *ick,
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struct ti_sysc_cookie *cookie)
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{
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if (!IS_ERR(fck))
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cookie->clkdm = ti_sysc_find_one_clockdomain(fck);
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if (cookie->clkdm)
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return 0;
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if (!IS_ERR(ick))
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cookie->clkdm = ti_sysc_find_one_clockdomain(ick);
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if (cookie->clkdm)
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return 0;
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return -ENODEV;
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}
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static void ti_sysc_clkdm_deny_idle(struct device *dev,
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const struct ti_sysc_cookie *cookie)
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{
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if (cookie->clkdm)
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clkdm_deny_idle(cookie->clkdm);
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}
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static void ti_sysc_clkdm_allow_idle(struct device *dev,
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const struct ti_sysc_cookie *cookie)
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{
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if (cookie->clkdm)
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clkdm_allow_idle(cookie->clkdm);
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}
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static int ti_sysc_enable_module(struct device *dev,
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const struct ti_sysc_cookie *cookie)
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{
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if (!cookie->data)
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return -EINVAL;
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return omap_hwmod_enable(cookie->data);
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}
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static int ti_sysc_idle_module(struct device *dev,
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const struct ti_sysc_cookie *cookie)
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{
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if (!cookie->data)
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return -EINVAL;
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return omap_hwmod_idle(cookie->data);
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}
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static int ti_sysc_shutdown_module(struct device *dev,
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const struct ti_sysc_cookie *cookie)
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{
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if (!cookie->data)
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return -EINVAL;
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return omap_hwmod_shutdown(cookie->data);
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}
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static struct of_dev_auxdata omap_auxdata_lookup[];
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static struct ti_sysc_platform_data ti_sysc_pdata = {
|
|
.auxdata = omap_auxdata_lookup,
|
|
.init_clockdomain = ti_sysc_clkdm_init,
|
|
.clkdm_deny_idle = ti_sysc_clkdm_deny_idle,
|
|
.clkdm_allow_idle = ti_sysc_clkdm_allow_idle,
|
|
.init_module = omap_hwmod_init_module,
|
|
.enable_module = ti_sysc_enable_module,
|
|
.idle_module = ti_sysc_idle_module,
|
|
.shutdown_module = ti_sysc_shutdown_module,
|
|
};
|
|
|
|
static struct pcs_pdata pcs_pdata;
|
|
|
|
void omap_pcs_legacy_init(int irq, void (*rearm)(void))
|
|
{
|
|
pcs_pdata.irq = irq;
|
|
pcs_pdata.rearm = rearm;
|
|
}
|
|
|
|
/*
|
|
* GPIOs for TWL are initialized by the I2C bus and need custom
|
|
* handing until DSS has device tree bindings.
|
|
*/
|
|
void omap_auxdata_legacy_init(struct device *dev)
|
|
{
|
|
if (dev->platform_data)
|
|
return;
|
|
|
|
if (strcmp("twl4030-gpio", dev_name(dev)))
|
|
return;
|
|
|
|
dev->platform_data = &twl_gpio_auxdata;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
|
|
static struct omap_mcbsp_platform_data mcbsp_pdata;
|
|
static void __init omap3_mcbsp_init(void)
|
|
{
|
|
omap3_mcbsp_init_pdata_callback(&mcbsp_pdata);
|
|
}
|
|
#else
|
|
static void __init omap3_mcbsp_init(void) {}
|
|
#endif
|
|
|
|
/*
|
|
* Few boards still need auxdata populated before we populate
|
|
* the dev entries in of_platform_populate().
|
|
*/
|
|
static struct pdata_init auxdata_quirks[] __initdata = {
|
|
#ifdef CONFIG_SOC_OMAP2420
|
|
{ "nokia,n800", omap2420_n8x0_legacy_init, },
|
|
{ "nokia,n810", omap2420_n8x0_legacy_init, },
|
|
{ "nokia,n810-wimax", omap2420_n8x0_legacy_init, },
|
|
#endif
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, },
|
|
#endif
|
|
{ /* sentinel */ },
|
|
};
|
|
|
|
struct omap_sr_data __maybe_unused omap_sr_pdata[OMAP_SR_NR];
|
|
|
|
static struct of_dev_auxdata omap_auxdata_lookup[] = {
|
|
#ifdef CONFIG_MACH_NOKIA_N8X0
|
|
OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
|
|
OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),
|
|
OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data),
|
|
#endif
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
|
|
&omap3_iommu_pdata),
|
|
OF_DEV_AUXDATA("ti,omap2-iommu", 0x480bd400, "480bd400.mmu",
|
|
&omap3_iommu_isp_pdata),
|
|
OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000,
|
|
"480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
|
|
OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000,
|
|
"480c9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
|
|
OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]),
|
|
OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]),
|
|
/* Only on am3517 */
|
|
OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
|
|
OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
|
|
&am35xx_emac_pdata),
|
|
OF_DEV_AUXDATA("nokia,n900-rom-rng", 0, NULL, rx51_secure_rng_call),
|
|
/* McBSP modules with sidetone core */
|
|
#if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
|
|
OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49022000, "49022000.mcbsp", &mcbsp_pdata),
|
|
OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49024000, "49024000.mcbsp", &mcbsp_pdata),
|
|
#endif
|
|
#endif
|
|
#ifdef CONFIG_SOC_AM33XX
|
|
OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
|
|
&wkup_m3_data),
|
|
#endif
|
|
#ifdef CONFIG_SOC_AM43XX
|
|
OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
|
|
&wkup_m3_data),
|
|
#endif
|
|
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
|
OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000,
|
|
"4a0db000.smartreflex", &omap_sr_pdata[OMAP_SR_IVA]),
|
|
OF_DEV_AUXDATA("ti,omap4-smartreflex-core", 0x4a0dd000,
|
|
"4a0dd000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
|
|
OF_DEV_AUXDATA("ti,omap4-smartreflex-mpu", 0x4a0d9000,
|
|
"4a0d9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
|
|
#endif
|
|
#ifdef CONFIG_SOC_DRA7XX
|
|
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
|
|
&dra7_hsmmc_data_mmc1),
|
|
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
|
|
&dra7_hsmmc_data_mmc2),
|
|
OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
|
|
&dra7_hsmmc_data_mmc3),
|
|
OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d01000, "40d01000.mmu",
|
|
&dra7_ipu1_dsp_iommu_pdata),
|
|
OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu",
|
|
&dra7_ipu1_dsp_iommu_pdata),
|
|
OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu",
|
|
&dra7_ipu1_dsp_iommu_pdata),
|
|
#endif
|
|
/* Common auxdata */
|
|
OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
|
|
OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
|
|
{ /* sentinel */ },
|
|
};
|
|
|
|
/*
|
|
* Few boards still need to initialize some legacy devices with
|
|
* platform data until the drivers support device tree.
|
|
*/
|
|
static struct pdata_init pdata_quirks[] __initdata = {
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
{ "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
|
|
{ "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
|
|
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
|
|
{ "nokia,omap3-n900", nokia_n900_legacy_init, },
|
|
{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },
|
|
{ "nokia,omap3-n950", hsmmc2_internal_input_clk, },
|
|
{ "isee,omap3-igep0020-rev-f", omap3_igep0020_rev_f_legacy_init, },
|
|
{ "isee,omap3-igep0030-rev-g", omap3_igep0030_rev_g_legacy_init, },
|
|
{ "logicpd,dm3730-torpedo-devkit", omap3_logicpd_torpedo_init, },
|
|
{ "ti,omap3-evm-37xx", omap3_evm_legacy_init, },
|
|
{ "ti,am3517-evm", am3517_evm_legacy_init, },
|
|
{ "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },
|
|
{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
|
|
{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
|
|
#endif
|
|
#ifdef CONFIG_SOC_OMAP5
|
|
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
|
|
#endif
|
|
#ifdef CONFIG_SOC_DRA7XX
|
|
{ "ti,dra7-evm", dra7x_evm_mmc_quirk, },
|
|
#endif
|
|
{ /* sentinel */ },
|
|
};
|
|
|
|
static void pdata_quirks_check(struct pdata_init *quirks)
|
|
{
|
|
while (quirks->compatible) {
|
|
if (of_machine_is_compatible(quirks->compatible)) {
|
|
if (quirks->fn)
|
|
quirks->fn();
|
|
}
|
|
quirks++;
|
|
}
|
|
}
|
|
|
|
void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table)
|
|
{
|
|
/*
|
|
* We still need this for omap2420 and omap3 PM to work, others are
|
|
* using drivers/misc/sram.c already.
|
|
*/
|
|
if (of_machine_is_compatible("ti,omap2420") ||
|
|
of_machine_is_compatible("ti,omap3"))
|
|
omap_sdrc_init(NULL, NULL);
|
|
|
|
if (of_machine_is_compatible("ti,omap3"))
|
|
omap3_mcbsp_init();
|
|
pdata_quirks_check(auxdata_quirks);
|
|
of_platform_populate(NULL, omap_dt_match_table,
|
|
omap_auxdata_lookup, NULL);
|
|
pdata_quirks_check(pdata_quirks);
|
|
}
|