linux-brain/arch/arm/mach-mmp/irqs.h
Greg Kroah-Hartman b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00

241 lines
7.4 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_MACH_IRQS_H
#define __ASM_MACH_IRQS_H
/*
* Interrupt numbers for PXA168
*/
#define IRQ_PXA168_NONE (-1)
#define IRQ_PXA168_SSP4 0
#define IRQ_PXA168_SSP3 1
#define IRQ_PXA168_SSP2 2
#define IRQ_PXA168_SSP1 3
#define IRQ_PXA168_PMIC_INT 4
#define IRQ_PXA168_RTC_INT 5
#define IRQ_PXA168_RTC_ALARM 6
#define IRQ_PXA168_TWSI0 7
#define IRQ_PXA168_GPU 8
#define IRQ_PXA168_KEYPAD 9
#define IRQ_PXA168_ONEWIRE 12
#define IRQ_PXA168_TIMER1 13
#define IRQ_PXA168_TIMER2 14
#define IRQ_PXA168_TIMER3 15
#define IRQ_PXA168_CMU 16
#define IRQ_PXA168_SSP5 17
#define IRQ_PXA168_MSP_WAKEUP 19
#define IRQ_PXA168_CF_WAKEUP 20
#define IRQ_PXA168_XD_WAKEUP 21
#define IRQ_PXA168_MFU 22
#define IRQ_PXA168_MSP 23
#define IRQ_PXA168_CF 24
#define IRQ_PXA168_XD 25
#define IRQ_PXA168_DDR_INT 26
#define IRQ_PXA168_UART1 27
#define IRQ_PXA168_UART2 28
#define IRQ_PXA168_UART3 29
#define IRQ_PXA168_WDT 35
#define IRQ_PXA168_MAIN_PMU 36
#define IRQ_PXA168_FRQ_CHANGE 38
#define IRQ_PXA168_SDH1 39
#define IRQ_PXA168_SDH2 40
#define IRQ_PXA168_LCD 41
#define IRQ_PXA168_CI 42
#define IRQ_PXA168_USB1 44
#define IRQ_PXA168_NAND 45
#define IRQ_PXA168_HIFI_DMA 46
#define IRQ_PXA168_DMA_INT0 47
#define IRQ_PXA168_DMA_INT1 48
#define IRQ_PXA168_GPIOX 49
#define IRQ_PXA168_USB2 51
#define IRQ_PXA168_AC97 57
#define IRQ_PXA168_TWSI1 58
#define IRQ_PXA168_AP_PMU 60
#define IRQ_PXA168_SM_INT 63
/*
* Interrupt numbers for PXA910
*/
#define IRQ_PXA910_NONE (-1)
#define IRQ_PXA910_AIRQ 0
#define IRQ_PXA910_SSP3 1
#define IRQ_PXA910_SSP2 2
#define IRQ_PXA910_SSP1 3
#define IRQ_PXA910_PMIC_INT 4
#define IRQ_PXA910_RTC_INT 5
#define IRQ_PXA910_RTC_ALARM 6
#define IRQ_PXA910_TWSI0 7
#define IRQ_PXA910_GPU 8
#define IRQ_PXA910_KEYPAD 9
#define IRQ_PXA910_ROTARY 10
#define IRQ_PXA910_TRACKBALL 11
#define IRQ_PXA910_ONEWIRE 12
#define IRQ_PXA910_AP1_TIMER1 13
#define IRQ_PXA910_AP1_TIMER2 14
#define IRQ_PXA910_AP1_TIMER3 15
#define IRQ_PXA910_IPC_AP0 16
#define IRQ_PXA910_IPC_AP1 17
#define IRQ_PXA910_IPC_AP2 18
#define IRQ_PXA910_IPC_AP3 19
#define IRQ_PXA910_IPC_AP4 20
#define IRQ_PXA910_IPC_CP0 21
#define IRQ_PXA910_IPC_CP1 22
#define IRQ_PXA910_IPC_CP2 23
#define IRQ_PXA910_IPC_CP3 24
#define IRQ_PXA910_IPC_CP4 25
#define IRQ_PXA910_L2_DDR 26
#define IRQ_PXA910_UART2 27
#define IRQ_PXA910_UART3 28
#define IRQ_PXA910_AP2_TIMER1 29
#define IRQ_PXA910_AP2_TIMER2 30
#define IRQ_PXA910_CP2_TIMER1 31
#define IRQ_PXA910_CP2_TIMER2 32
#define IRQ_PXA910_CP2_TIMER3 33
#define IRQ_PXA910_GSSP 34
#define IRQ_PXA910_CP2_WDT 35
#define IRQ_PXA910_MAIN_PMU 36
#define IRQ_PXA910_CP_FREQ_CHG 37
#define IRQ_PXA910_AP_FREQ_CHG 38
#define IRQ_PXA910_MMC 39
#define IRQ_PXA910_AEU 40
#define IRQ_PXA910_LCD 41
#define IRQ_PXA910_CCIC 42
#define IRQ_PXA910_IRE 43
#define IRQ_PXA910_USB1 44
#define IRQ_PXA910_NAND 45
#define IRQ_PXA910_HIFI_DMA 46
#define IRQ_PXA910_DMA_INT0 47
#define IRQ_PXA910_DMA_INT1 48
#define IRQ_PXA910_AP_GPIO 49
#define IRQ_PXA910_AP2_TIMER3 50
#define IRQ_PXA910_USB2 51
#define IRQ_PXA910_TWSI1 54
#define IRQ_PXA910_CP_GPIO 55
#define IRQ_PXA910_UART1 59 /* Slow UART */
#define IRQ_PXA910_AP_PMU 60
#define IRQ_PXA910_SM_INT 63 /* from PinMux */
/*
* Interrupt numbers for MMP2
*/
#define IRQ_MMP2_NONE (-1)
#define IRQ_MMP2_SSP1 0
#define IRQ_MMP2_SSP2 1
#define IRQ_MMP2_SSPA1 2
#define IRQ_MMP2_SSPA2 3
#define IRQ_MMP2_PMIC_MUX 4 /* PMIC & Charger */
#define IRQ_MMP2_RTC_MUX 5
#define IRQ_MMP2_TWSI1 7
#define IRQ_MMP2_GPU 8
#define IRQ_MMP2_KEYPAD_MUX 9
#define IRQ_MMP2_ROTARY 10
#define IRQ_MMP2_TRACKBALL 11
#define IRQ_MMP2_ONEWIRE 12
#define IRQ_MMP2_TIMER1 13
#define IRQ_MMP2_TIMER2 14
#define IRQ_MMP2_TIMER3 15
#define IRQ_MMP2_RIPC 16
#define IRQ_MMP2_TWSI_MUX 17 /* TWSI2 ~ TWSI6 */
#define IRQ_MMP2_HDMI 19
#define IRQ_MMP2_SSP3 20
#define IRQ_MMP2_SSP4 21
#define IRQ_MMP2_USB_HS1 22
#define IRQ_MMP2_USB_HS2 23
#define IRQ_MMP2_UART3 24
#define IRQ_MMP2_UART1 27
#define IRQ_MMP2_UART2 28
#define IRQ_MMP2_MIPI_DSI 29
#define IRQ_MMP2_CI2 30
#define IRQ_MMP2_PMU_TIMER1 31
#define IRQ_MMP2_PMU_TIMER2 32
#define IRQ_MMP2_PMU_TIMER3 33
#define IRQ_MMP2_USB_FS 34
#define IRQ_MMP2_MISC_MUX 35
#define IRQ_MMP2_WDT1 36
#define IRQ_MMP2_NAND_DMA 37
#define IRQ_MMP2_USIM 38
#define IRQ_MMP2_MMC 39
#define IRQ_MMP2_WTM 40
#define IRQ_MMP2_LCD 41
#define IRQ_MMP2_CI 42
#define IRQ_MMP2_IRE 43
#define IRQ_MMP2_USB_OTG 44
#define IRQ_MMP2_NAND 45
#define IRQ_MMP2_UART4 46
#define IRQ_MMP2_DMA_FIQ 47
#define IRQ_MMP2_DMA_RIQ 48
#define IRQ_MMP2_GPIO 49
#define IRQ_MMP2_MIPI_HSI1_MUX 51
#define IRQ_MMP2_MMC2 52
#define IRQ_MMP2_MMC3 53
#define IRQ_MMP2_MMC4 54
#define IRQ_MMP2_MIPI_HSI0_MUX 55
#define IRQ_MMP2_MSP 58
#define IRQ_MMP2_MIPI_SLIM_DMA 59
#define IRQ_MMP2_PJ4_FREQ_CHG 60
#define IRQ_MMP2_MIPI_SLIM 62
#define IRQ_MMP2_SM 63
#define IRQ_MMP2_MUX_BASE 64
/* secondary interrupt of INT #4 */
#define IRQ_MMP2_PMIC_BASE (IRQ_MMP2_MUX_BASE)
#define IRQ_MMP2_CHARGER (IRQ_MMP2_PMIC_BASE + 0)
#define IRQ_MMP2_PMIC (IRQ_MMP2_PMIC_BASE + 1)
/* secondary interrupt of INT #5 */
#define IRQ_MMP2_RTC_BASE (IRQ_MMP2_PMIC_BASE + 2)
#define IRQ_MMP2_RTC_ALARM (IRQ_MMP2_RTC_BASE + 0)
#define IRQ_MMP2_RTC (IRQ_MMP2_RTC_BASE + 1)
/* secondary interrupt of INT #9 */
#define IRQ_MMP2_KEYPAD_BASE (IRQ_MMP2_RTC_BASE + 2)
#define IRQ_MMP2_KPC (IRQ_MMP2_KEYPAD_BASE + 0)
#define IRQ_MMP2_ROTORY (IRQ_MMP2_KEYPAD_BASE + 1)
#define IRQ_MMP2_TBALL (IRQ_MMP2_KEYPAD_BASE + 2)
/* secondary interrupt of INT #17 */
#define IRQ_MMP2_TWSI_BASE (IRQ_MMP2_KEYPAD_BASE + 3)
#define IRQ_MMP2_TWSI2 (IRQ_MMP2_TWSI_BASE + 0)
#define IRQ_MMP2_TWSI3 (IRQ_MMP2_TWSI_BASE + 1)
#define IRQ_MMP2_TWSI4 (IRQ_MMP2_TWSI_BASE + 2)
#define IRQ_MMP2_TWSI5 (IRQ_MMP2_TWSI_BASE + 3)
#define IRQ_MMP2_TWSI6 (IRQ_MMP2_TWSI_BASE + 4)
/* secondary interrupt of INT #35 */
#define IRQ_MMP2_MISC_BASE (IRQ_MMP2_TWSI_BASE + 5)
#define IRQ_MMP2_PERF (IRQ_MMP2_MISC_BASE + 0)
#define IRQ_MMP2_L2_PA_ECC (IRQ_MMP2_MISC_BASE + 1)
#define IRQ_MMP2_L2_ECC (IRQ_MMP2_MISC_BASE + 2)
#define IRQ_MMP2_L2_UECC (IRQ_MMP2_MISC_BASE + 3)
#define IRQ_MMP2_DDR (IRQ_MMP2_MISC_BASE + 4)
#define IRQ_MMP2_FAB0_TIMEOUT (IRQ_MMP2_MISC_BASE + 5)
#define IRQ_MMP2_FAB1_TIMEOUT (IRQ_MMP2_MISC_BASE + 6)
#define IRQ_MMP2_FAB2_TIMEOUT (IRQ_MMP2_MISC_BASE + 7)
#define IRQ_MMP2_THERMAL (IRQ_MMP2_MISC_BASE + 9)
#define IRQ_MMP2_MAIN_PMU (IRQ_MMP2_MISC_BASE + 10)
#define IRQ_MMP2_WDT2 (IRQ_MMP2_MISC_BASE + 11)
#define IRQ_MMP2_CORESIGHT (IRQ_MMP2_MISC_BASE + 12)
#define IRQ_MMP2_COMMTX (IRQ_MMP2_MISC_BASE + 13)
#define IRQ_MMP2_COMMRX (IRQ_MMP2_MISC_BASE + 14)
/* secondary interrupt of INT #51 */
#define IRQ_MMP2_MIPI_HSI1_BASE (IRQ_MMP2_MISC_BASE + 15)
#define IRQ_MMP2_HSI1_CAWAKE (IRQ_MMP2_MIPI_HSI1_BASE + 0)
#define IRQ_MMP2_MIPI_HSI_INT1 (IRQ_MMP2_MIPI_HSI1_BASE + 1)
/* secondary interrupt of INT #55 */
#define IRQ_MMP2_MIPI_HSI0_BASE (IRQ_MMP2_MIPI_HSI1_BASE + 2)
#define IRQ_MMP2_HSI0_CAWAKE (IRQ_MMP2_MIPI_HSI0_BASE + 0)
#define IRQ_MMP2_MIPI_HSI_INT0 (IRQ_MMP2_MIPI_HSI0_BASE + 1)
#define IRQ_MMP2_MUX_END (IRQ_MMP2_MIPI_HSI0_BASE + 2)
#define IRQ_GPIO_START 128
#define MMP_NR_BUILTIN_GPIO 192
#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio))
#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
#define MMP_NR_IRQS IRQ_BOARD_START
#endif /* __ASM_MACH_IRQS_H */