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d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
145 lines
2.8 KiB
ArmAsm
145 lines
2.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2009 Sascha Hauer <s.hauer@pengutronix.de>
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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/*
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* r8 = bit 0-15: tx offset, bit 16-31: tx buffer size
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* r9 = bit 0-15: rx offset, bit 16-31: rx buffer size
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*/
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#define SSI_STX0 0x00
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#define SSI_SRX0 0x08
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#define SSI_SISR 0x14
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#define SSI_SIER 0x18
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#define SSI_SACNT 0x38
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#define SSI_SACNT_AC97EN (1 << 0)
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#define SSI_SIER_TFE0_EN (1 << 0)
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#define SSI_SISR_TFE0 (1 << 0)
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#define SSI_SISR_RFF0 (1 << 2)
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#define SSI_SIER_RFF0_EN (1 << 2)
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.text
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.global imx_ssi_fiq_start
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.global imx_ssi_fiq_end
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.global imx_ssi_fiq_base
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.global imx_ssi_fiq_rx_buffer
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.global imx_ssi_fiq_tx_buffer
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/*
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* imx_ssi_fiq_start is _intentionally_ not marked as a function symbol
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* using ENDPROC(). imx_ssi_fiq_start and imx_ssi_fiq_end are used to
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* mark the function body so that it can be copied to the FIQ vector in
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* the vectors page. imx_ssi_fiq_start should only be called as the result
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* of an FIQ: calling it directly will not work.
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*/
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imx_ssi_fiq_start:
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ldr r12, .L_imx_ssi_fiq_base
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/* TX */
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ldr r13, .L_imx_ssi_fiq_tx_buffer
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/* shall we send? */
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ldr r11, [r12, #SSI_SIER]
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tst r11, #SSI_SIER_TFE0_EN
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beq 1f
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/* TX FIFO empty? */
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ldr r11, [r12, #SSI_SISR]
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tst r11, #SSI_SISR_TFE0
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beq 1f
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mov r10, #0x10000
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sub r10, #1
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and r10, r10, r8 /* r10: current buffer offset */
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add r13, r13, r10
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ldrh r11, [r13]
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strh r11, [r12, #SSI_STX0]
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ldrh r11, [r13, #2]
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strh r11, [r12, #SSI_STX0]
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ldrh r11, [r13, #4]
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strh r11, [r12, #SSI_STX0]
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ldrh r11, [r13, #6]
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strh r11, [r12, #SSI_STX0]
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add r10, #8
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lsr r11, r8, #16 /* r11: buffer size */
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cmp r10, r11
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lslgt r8, r11, #16
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addle r8, #8
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1:
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/* RX */
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/* shall we receive? */
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ldr r11, [r12, #SSI_SIER]
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tst r11, #SSI_SIER_RFF0_EN
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beq 1f
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/* RX FIFO full? */
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ldr r11, [r12, #SSI_SISR]
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tst r11, #SSI_SISR_RFF0
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beq 1f
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ldr r13, .L_imx_ssi_fiq_rx_buffer
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mov r10, #0x10000
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sub r10, #1
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and r10, r10, r9 /* r10: current buffer offset */
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add r13, r13, r10
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ldr r11, [r12, #SSI_SACNT]
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tst r11, #SSI_SACNT_AC97EN
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ldr r11, [r12, #SSI_SRX0]
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strh r11, [r13]
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ldr r11, [r12, #SSI_SRX0]
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strh r11, [r13, #2]
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/* dummy read to skip slot 12 */
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ldrne r11, [r12, #SSI_SRX0]
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ldr r11, [r12, #SSI_SRX0]
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strh r11, [r13, #4]
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ldr r11, [r12, #SSI_SRX0]
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strh r11, [r13, #6]
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/* dummy read to skip slot 12 */
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ldrne r11, [r12, #SSI_SRX0]
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add r10, #8
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lsr r11, r9, #16 /* r11: buffer size */
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cmp r10, r11
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lslgt r9, r11, #16
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addle r9, #8
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1:
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@ return from FIQ
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subs pc, lr, #4
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.align
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.L_imx_ssi_fiq_base:
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imx_ssi_fiq_base:
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.word 0x0
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.L_imx_ssi_fiq_rx_buffer:
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imx_ssi_fiq_rx_buffer:
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.word 0x0
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.L_imx_ssi_fiq_tx_buffer:
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imx_ssi_fiq_tx_buffer:
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.word 0x0
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.L_imx_ssi_fiq_end:
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imx_ssi_fiq_end:
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