Commit Graph

31 Commits

Author SHA1 Message Date
Gabriel Fernandez b06df56bad clk: stm32mp1: Add ddrperfm clock
Add ddrperfm clock for DDR Performance Monitor driver

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-29 11:13:23 -07:00
Gabriel Fernandez 97621d22df clk: stm32mp1: fix bit width of hse_rtc divider
Fix the bit width of the hse rtc divider because it's off by one.

Fixes: 2c87c9d331 ("clk: stm32mp1: add RTC clock")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:13:22 -08:00
Gabriel Fernandez f9b76fd24d clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag
The divisor of ethptp_k and ck_hse_rtc clocks is: 'value register
plus one'.
Then CLK_DIVIDER_ALLOW_ZERO flag has no effect and is useless here.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:13:21 -08:00
Gabriel Fernandez d3f2e33c87 clk: stm32mp1: fix HSI divider flag
The divider of HSI (clk-hsi-div) is power of two divider.

Fixes: 9bee94e7b7 ("clk: stm32mp1: Introduce STM32MP1 clock driver")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:13:21 -08:00
Gabriel Fernandez 140fc4e406 clk: stm32mp1: fix mcu divider table
index 8: ck_mcu is divided by 256 (not 512)

Fixes: e51d297e9a ("clk: stm32mp1: add Sub System clocks")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:13:20 -08:00
Gabriel Fernandez c488b24f86 clk: stm32mp1: set ck_csi as critical clock
ck_csi is used for IO compensation so it should be
considered as "always-on" and kept on.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:13:19 -08:00
Gabriel Fernandez 72cfd1ad10 clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks
STM32MP1 clock IP offers lots of Kernel clocks that are shared
by multiple IP's at the same time.
Then boot loader applies a clock tree that allows to use all IP's
at same time and with the maximum of performance.
Not change parents on a change rate on kernel clocks ensures
the integrity of the system.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:13:18 -08:00
Gabriel Fernandez 749c9e553e clk: stm32mp1: parent clocks update
Fixes parent clock for axi, fdcan, sai and adc12 clocks.

Fixes: e51d297e9a ("clk: stm32mp1: add Sub System clocks")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:13:06 -08:00
YueHaibing 25bf466bd2 clk: stm32mp1: drop pointless static qualifier in stm32_register_hw_clk()
There is no need to have the 'struct clk_hw **hws' variable static
since new value always be assigned before use it.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-29 23:12:35 -08:00
Rob Herring e665f029a2 clk: Convert to using %pOFn instead of device_node.name
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-30 09:50:20 -07:00
Linus Torvalds 6419945e33 This time we have a good set of changes to the core framework that do some
general cleanups, but nothing too major. The majority of the diff goes to
 two SoCs, Actions Semi and Qualcomm. A brand new driver is introduced for
 Actions Semi so it takes up some lines to add all the different types, and
 the Qualcomm diff is there because we add support for two SoCs and it's quite
 a bit of data.
 
 Otherwise the big driver updates are on TI Davinci and Amlogic platforms. And
 then the long tail of driver updates for various fixes and stuff follows
 after that.
 
 Core:
  - debugfs cleanups removing error checking and an unused provider API
  - Removal of a clk init typedef that isn't used
  - Usage of match_string() to simplify parent string name matching
  - OF clk helpers moved to their own file (linux/of_clk.h)
  - Make clk warnings more readable across kernel versions
 
 New Drivers:
  - Qualcomm SDM845 GCC and Video clk controllers
  - Qualcomm MSM8998 GCC
  - Actions Semi S900 SoC support
  - Nuvoton npcm750 microcontroller clks
  - Amlogic axg AO clock controller
 
 Removed Drivers:
  - Deprecated Rockchip clk-gate driver
 
 Updates:
  - debugfs functions stopped checking return values
  - Support for the MSIOF module clocks on Rensas R-Car M3-N
  - Support for the new Rensas RZ/G1C and R-Car E3 SoCs
  - Qualcomm GDSC, RCG, and PLL updates for clk changes in new SoCs
  - Berlin and Amlogic SPDX tagging
  - Usage of of_clk_get_parent_count() in more places
  - Proper implementation of the CDEV1/2 clocks on Tegra20
  - Allwinner H6 PRCM clock support and R40 EMAC support
  - Add critical flag to meson8b's fdiv2 as temporary fixup for ethernet
  - Round closest support for meson's mpll driver
  - Support for meson8b nand clocks and gxbb video decoder clocks
  - Mediatek mali clks
  - STM32MP1 fixes
  - Uniphier LD11/LD20 stream demux system clock
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This time we have a good set of changes to the core framework that do
  some general cleanups, but nothing too major. The majority of the diff
  goes to two SoCs, Actions Semi and Qualcomm. A brand new driver is
  introduced for Actions Semi so it takes up some lines to add all the
  different types, and the Qualcomm diff is there because we add support
  for two SoCs and it's quite a bit of data.

  Otherwise the big driver updates are on TI Davinci and Amlogic
  platforms. And then the long tail of driver updates for various fixes
  and stuff follows after that.

  Core:
   - debugfs cleanups removing error checking and an unused provider API
   - Removal of a clk init typedef that isn't used
   - Usage of match_string() to simplify parent string name matching
   - OF clk helpers moved to their own file (linux/of_clk.h)
   - Make clk warnings more readable across kernel versions

  New Drivers:
   - Qualcomm SDM845 GCC and Video clk controllers
   - Qualcomm MSM8998 GCC
   - Actions Semi S900 SoC support
   - Nuvoton npcm750 microcontroller clks
   - Amlogic axg AO clock controller

  Removed Drivers:
   - Deprecated Rockchip clk-gate driver

  Updates:
   - debugfs functions stopped checking return values
   - Support for the MSIOF module clocks on Rensas R-Car M3-N
   - Support for the new Rensas RZ/G1C and R-Car E3 SoCs
   - Qualcomm GDSC, RCG, and PLL updates for clk changes in new SoCs
   - Berlin and Amlogic SPDX tagging
   - Usage of of_clk_get_parent_count() in more places
   - Proper implementation of the CDEV1/2 clocks on Tegra20
   - Allwinner H6 PRCM clock support and R40 EMAC support
   - Add critical flag to meson8b's fdiv2 as temporary fixup for ethernet
   - Round closest support for meson's mpll driver
   - Support for meson8b nand clocks and gxbb video decoder clocks
   - Mediatek mali clks
   - STM32MP1 fixes
   - Uniphier LD11/LD20 stream demux system clock"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits)
  clk: qcom: Export clk_fabia_pll_configure()
  clk: bcm: Update and add Stingray clock entries
  dt-bindings: clk: Update Stingray binding doc
  clk-si544: Properly round requested frequency to nearest match
  clk: ingenic: jz4770: Add 150us delay after enabling VPU clock
  clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock
  clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle
  clk: ingenic: jz4770: Change OTG from custom to standard gated clock
  clk: ingenic: Support specifying "wait for clock stable" delay
  clk: ingenic: Add support for clocks whose gate bit is inverted
  clk: use match_string() helper
  clk: bcm2835: use match_string() helper
  clk: Return void from debug_init op
  clk: remove clk_debugfs_add_file()
  clk: tegra: no need to check return value of debugfs_create functions
  clk: davinci: no need to check return value of debugfs_create functions
  clk: bcm2835: no need to check return value of debugfs_create functions
  clk: no need to check return value of debugfs_create functions
  clk: imx6: add EPIT clock support
  clk: mvebu: use correct bit for 98DX3236 NAND
  ...
2018-06-09 12:06:24 -07:00
Kees Cook acafe7e302 treewide: Use struct_size() for kmalloc()-family
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:

struct foo {
    int stuff;
    void *entry[];
};

instance = kmalloc(sizeof(struct foo) + sizeof(void *) * count, GFP_KERNEL);

Instead of leaving these open-coded and prone to type mistakes, we can
now use the new struct_size() helper:

instance = kmalloc(struct_size(instance, entry, count), GFP_KERNEL);

This patch makes the changes for kmalloc()-family (and kvmalloc()-family)
uses. It was done via automatic conversion with manual review for the
"CHECKME" non-standard cases noted below, using the following Coccinelle
script:

// pkey_cache = kmalloc(sizeof *pkey_cache + tprops->pkey_tbl_len *
//                      sizeof *pkey_cache->table, GFP_KERNEL);
@@
identifier alloc =~ "kmalloc|kzalloc|kvmalloc|kvzalloc";
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@

- alloc(sizeof(*VAR) + COUNT * sizeof(*VAR->ELEMENT), GFP)
+ alloc(struct_size(VAR, ELEMENT, COUNT), GFP)

// mr = kzalloc(sizeof(*mr) + m * sizeof(mr->map[0]), GFP_KERNEL);
@@
identifier alloc =~ "kmalloc|kzalloc|kvmalloc|kvzalloc";
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@

- alloc(sizeof(*VAR) + COUNT * sizeof(VAR->ELEMENT[0]), GFP)
+ alloc(struct_size(VAR, ELEMENT, COUNT), GFP)

// Same pattern, but can't trivially locate the trailing element name,
// or variable name.
@@
identifier alloc =~ "kmalloc|kzalloc|kvmalloc|kvzalloc";
expression GFP;
expression SOMETHING, COUNT, ELEMENT;
@@

- alloc(sizeof(SOMETHING) + COUNT * sizeof(ELEMENT), GFP)
+ alloc(CHECKME_struct_size(&SOMETHING, ELEMENT, COUNT), GFP)

Signed-off-by: Kees Cook <keescook@chromium.org>
2018-06-06 11:15:43 -07:00
Christophe JAILLET 823b68ea43 clk: stm32mp1: Fix a memory leak in 'clk_stm32_register_gate_ops()'
We allocate some memory which is neither used, nor referenced by anything.
So axe it.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-05-15 13:37:03 -07:00
Gabriel Fernandez 77dc00205c clk: stm32mp1: Add CLK_IGNORE_UNUSED to ck_sys_dbg clock
Don't disable the dbg clock if was set by bootloader.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-05-15 11:22:11 -07:00
Gabriel Fernandez ccf719b884 clk: stm32mp1: remove ck_apb_dbg clock
It's recommended to use only clk_sys_dbg clock instead to activate
debug IP.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:23 -07:00
Gabriel Fernandez 1742aed6e5 clk: stm32mp1: set stgen_k clock as critical
stgen_k should be declared as critical to avoid blocking console
when ck_hsi is not used.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:20 -07:00
Gabriel Fernandez a1bf646f71 clk: stm32mp1: add missing tzc2 clock
This patch adds tzc2 clock and rename tzc clock into tzc1

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:16 -07:00
Gabriel Fernandez 4cd2136031 clk: stm32mp1: fix SAI3 & SAI4 clocks
fix bad copy / paste.
SAI3 & SAI4 used gate of SAI2 instead SAI3 & SAI4

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:14 -07:00
Gabriel Fernandez aa5fc95fd5 clk: stm32mp1: remove unused dfsdm_src[] const
This patch remove unused constant.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:42:45 -07:00
Gabriel Fernandez e631ad60d2 clk: stm32mp1: add missing static
Add missing static for const parent names and clock ops.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:42:43 -07:00
Gabriel Fernandez 3a43006783 clk: stm32mp1: add Debug clocks
RCC manages clock for debug and trace.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:34 -07:00
Gabriel Fernandez 44cd455a8e clk: stm32mp1: add MCO clocks
Two micro-controller clock output (MCO) pins are available:
MCO1 and MCO2.
For each output, it is possible to select a clock source.
The selected clock can be divided thanks to configurable
prescaler.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:34 -07:00
Gabriel Fernandez 2c87c9d331 clk: stm32mp1: add RTC clock
This patch adds the RTC clock.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez 1f80590b6b clk: stm32mp1: add Peripheral & Kernel Clocks
Each peripheral requires a bus interface clock.
Some peripherals need also a dedicated clock for their communication
interface, this clock is generally asynchronous with respect to the bus
interface clock (peripheral clock), and is named kernel clock.

For each IP, Peripheral clock and Kernel are generally gating with same
gate. Also, Kernel clocks can share a same multiplexer.
This patch introduces a mechanism to manage a gate with several
clocks and to manage a shared multiplexer (mgate and mmux).

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez 799b6a125e clk: stm32mp1: add Kernel timers
This patch adds Kernel timers.
This patch adds timers kernel clock.
Timers are gather into two groups corresponding to the APB bus
they are attached to.
Each group has its own prescaler, managed in this patch.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez e51d297e9a clk: stm32mp1: add Sub System clocks
The RCC handles three sub-system clocks: ck_mpuss, ck_axiss
and ck_mcuss.
This patch adds also some MUX system and several prescalers.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez a97703c59f clk: stm32mp1: add Post-dividers for PLL
Each PLL has 3 outputs with post-dividers.

pll1_p is dedicated for Cortex-A7
pll1_q is not connected
pll1_r is not connected

pll2_p is dedicated for AXI
pll2_q is dedicated for GPU
pll2_r is dedicated for DDR

pll3_p is dedicated for mcu
pll3_q is for Peripheral Kernel Clock
pll3_r is for Peripheral Kernel Clock

pll4_p is for Peripheral Kernel Clock
pll4_q is for Peripheral Kernel Clock
pll4_r is for Peripheral Kernel Clock

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez c6cf4d3248 clk: stm32mp1: add PLL clocks
STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez dc32eaac49 clk: stm32mp1: add Source Clocks for PLLs
This patch adds source clocks for PLLs
This patch also introduces MUX clock API.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez 8e6c27c0d7 clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillators
MP1 Gate is a gate with a set and a clear register.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:32 -07:00
Gabriel Fernandez 9bee94e7b7 clk: stm32mp1: Introduce STM32MP1 clock driver
This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate, divider and fixed factor).

All clocks will be defined in one table.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:32 -07:00