ARM: dts: NSP: modify second CPU address

NSP B0 has a different address for the second core.  Since there should
not be any Ax versions in the field, it should be safe to universally
change this.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Jon Mason 2016-05-05 19:29:31 -04:00 committed by Florian Fainelli
parent d71eb94120
commit f7f20cba26

View File

@ -57,7 +57,7 @@
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
enable-method = "brcm,bcm-nsp-smp";
secondary-boot-reg = <0xffff042c>;
secondary-boot-reg = <0xffff0fec>;
reg = <0x1>;
};
};