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ARM: dts: NSP: modify second CPU address
NSP B0 has a different address for the second core. Since there should not be any Ax versions in the field, it should be safe to universally change this. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -57,7 +57,7 @@
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compatible = "arm,cortex-a9";
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next-level-cache = <&L2>;
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enable-method = "brcm,bcm-nsp-smp";
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secondary-boot-reg = <0xffff042c>;
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secondary-boot-reg = <0xffff0fec>;
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reg = <0x1>;
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};
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};
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