tty: serial: fsl_lpuart: correct the FIFO depth size

VF610/LS1021a/i.MX7ULP/i.MX8QXP reference manual describe the
TXFIFOSIZE/RXFIFOSIZE field as below.

000b - FIFO/Buffer depth = 1 dataword.
001b - FIFO/Buffer depth = 4 datawords.
010b - FIFO/Buffer depth = 8 datawords.
011b - FIFO/Buffer depth = 16 datawords.
100b - FIFO/Buffer depth = 32 datawords.
101b - FIFO/Buffer depth = 64 datawords.
110b - FIFO/Buffer depth = 128 datawords.
111b - FIFO/Buffer depth = 256 datawords. (Reserved for VF610)

So the FIFO depth should be: 0x1 << (val ? (val + 1) : 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Link: https://lore.kernel.org/r/20190717051930.15514-6-fugang.duan@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Fugang Duan 2019-07-17 13:19:30 +08:00 committed by Greg Kroah-Hartman
parent 638341d5db
commit f77ebb241c

View File

@ -214,6 +214,7 @@
#define UARTFIFO_TXSIZE_OFF 4
#define UARTFIFO_RXFE 0x00000008
#define UARTFIFO_RXSIZE_OFF 0
#define UARTFIFO_DEPTH(x) (0x1 << ((x) ? ((x) + 1) : 0))
#define UARTWATER_COUNT_MASK 0xff
#define UARTWATER_TXCNT_OFF 8
@ -1380,13 +1381,12 @@ static int lpuart_startup(struct uart_port *port)
/* determine FIFO size and enable FIFO mode */
temp = readb(sport->port.membase + UARTPFIFO);
sport->txfifo_size = 0x1 << (((temp >> UARTPFIFO_TXSIZE_OFF) &
UARTPFIFO_FIFOSIZE_MASK) + 1);
sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_TXSIZE_OFF) &
UARTPFIFO_FIFOSIZE_MASK);
sport->port.fifosize = sport->txfifo_size;
sport->rxfifo_size = 0x1 << (((temp >> UARTPFIFO_RXSIZE_OFF) &
UARTPFIFO_FIFOSIZE_MASK) + 1);
sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_RXSIZE_OFF) &
UARTPFIFO_FIFOSIZE_MASK);
spin_lock_irqsave(&sport->port.lock, flags);
@ -1431,13 +1431,12 @@ static int lpuart32_startup(struct uart_port *port)
/* determine FIFO size */
temp = lpuart32_read(&sport->port, UARTFIFO);
sport->txfifo_size = 0x1 << (((temp >> UARTFIFO_TXSIZE_OFF) &
UARTFIFO_FIFOSIZE_MASK) - 1);
sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_TXSIZE_OFF) &
UARTFIFO_FIFOSIZE_MASK);
sport->port.fifosize = sport->txfifo_size;
sport->rxfifo_size = 0x1 << (((temp >> UARTFIFO_RXSIZE_OFF) &
UARTFIFO_FIFOSIZE_MASK) - 1);
sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_RXSIZE_OFF) &
UARTFIFO_FIFOSIZE_MASK);
spin_lock_irqsave(&sport->port.lock, flags);