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[MIPS] Put an end to <asm/serial.h>'s long and annyoing existence
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
parent
192cca6ef2
commit
e7c4782f92
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@ -155,7 +155,6 @@ config MIPS_MALTA
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bool "MIPS Malta board"
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select ARCH_MAY_HAVE_PC_FDC
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select BOOT_ELF32
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select HAVE_STD_PC_SERIAL_PORT
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select DMA_NONCOHERENT
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select GENERIC_ISA_DMA
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select IRQ_CPU
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@ -2,7 +2,8 @@
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# Makefile for NEC DDB-Vrc5477 board
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#
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obj-y += irq.o irq_5477.o setup.o lcd44780.o
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obj-y += ddb5477-platform.o irq.o irq_5477.o setup.o \
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lcd44780.o
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obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
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obj-$(CONFIG_KGDB) += kgdb_io.o
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49
arch/mips/ddb5xxx/ddb5477/ddb5477-platform.c
Normal file
49
arch/mips/ddb5xxx/ddb5477/ddb5477-platform.c
Normal file
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@ -0,0 +1,49 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/serial_8250.h>
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#include <asm/ddb5xxx/ddb5477.h>
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#define DDB_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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#define DDB5477_PORT(base, int) \
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{ \
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.mapbase = base, \
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.irq = int, \
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.uartclk = 1843200, \
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.iotype = UPIO_MEM, \
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.flags = DDB_UART_FLAGS, \
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.regshift = 3, \
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}
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static struct plat_serial8250_port uart8250_data[] = {
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DDB5477_PORT(0xbfa04200, VRC5477_IRQ_UART0),
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DDB5477_PORT(0xbfa04240, VRC5477_IRQ_UART1),
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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return platform_device_register(&uart8250_device);
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}
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module_init(uart8250_init);
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("8250 UART probe driver for the NEC DDB5477");
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@ -2,6 +2,6 @@
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# Makefile for Momentum's Ocelot board.
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#
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obj-y += irq.o prom.o reset.o setup.o
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obj-y += irq.o ocelot-platform.o prom.o reset.o setup.o
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obj-$(CONFIG_KGDB) += dbg_io.o
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46
arch/mips/gt64120/momenco_ocelot/ocelot-platform.c
Normal file
46
arch/mips/gt64120/momenco_ocelot/ocelot-platform.c
Normal file
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@ -0,0 +1,46 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
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*
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* A NS16552 DUART with a 20MHz crystal.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#define OCELOT_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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static struct plat_serial8250_port uart8250_data[] = {
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{
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.mapbase = 0xe0001020,
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.irq = 4,
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.uartclk = 20000000,
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.iotype = UPIO_MEM,
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.flags = OCELOT_UART_FLAGS,
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.regshift = 2,
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},
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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return platform_device_register(&uart8250_device);
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}
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module_init(uart8250_init);
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("8250 UART probe driver for the Momenco Ocelot");
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@ -2,4 +2,4 @@
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# Makefile for the Jazz family specific parts of the kernel
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#
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obj-y := irq.o jazzdma.o reset.o setup.o
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obj-y := irq.o jazzdma.o jazz-platform.o reset.o setup.o
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60
arch/mips/jazz/jazz-platform.c
Normal file
60
arch/mips/jazz/jazz-platform.c
Normal file
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@ -0,0 +1,60 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/serial_8250.h>
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#include <asm/jazz.h>
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/*
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* Confusion ... It seems the original Microsoft Jazz machine used to have a
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* 4.096MHz clock for its UART while the MIPS Magnum and Millenium systems
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* had 8MHz. The Olivetti M700-10 and the Acer PICA have 1.8432MHz like PCs.
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*/
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#ifdef CONFIG_OLIVETTI_M700
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#define JAZZ_BASE_BAUD 1843200
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#else
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#define JAZZ_BASE_BAUD 8000000 /* 3072000 */
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#endif
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#define JAZZ_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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#define JAZZ_PORT(base, int) \
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{ \
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.mapbase = base, \
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.irq = int, \
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.uartclk = JAZZ_BASE_BAUD, \
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.iotype = UPIO_MEM, \
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.flags = JAZZ_UART_FLAGS, \
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.regshift = 0, \
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}
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static struct plat_serial8250_port uart8250_data[] = {
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JAZZ_PORT(JAZZ_SERIAL1_BASE, JAZZ_SERIAL1_IRQ),
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JAZZ_PORT(JAZZ_SERIAL2_BASE, JAZZ_SERIAL2_IRQ),
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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return platform_device_register(&uart8250_device);
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}
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module_init(uart8250_init);
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("8250 UART probe driver for the Jazz family");
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47
arch/mips/kernel/8250-platform.c
Normal file
47
arch/mips/kernel/8250-platform.c
Normal file
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@ -0,0 +1,47 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#define PORT(base, int) \
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{ \
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.iobase = base, \
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.irq = int, \
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.uartclk = 1843200, \
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.iotype = UPIO_PORT, \
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
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.regshift = 0, \
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}
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static struct plat_serial8250_port uart8250_data[] = {
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PORT(0x3F8, 4),
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PORT(0x2F8, 3),
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PORT(0x3E8, 4),
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PORT(0x2E8, 3),
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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return platform_device_register(&uart8250_device);
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}
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module_init(uart8250_init);
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Generic 8250 UART probe driver");
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@ -68,3 +68,5 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
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obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o
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@ -19,6 +19,7 @@
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# under Linux.
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#
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obj-y := malta_int.o malta_setup.o
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obj-y := malta_int.o malta_platform.o malta_setup.o
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obj-$(CONFIG_MTD) += malta_mtd.o
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obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
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65
arch/mips/mips-boards/malta/malta_platform.c
Normal file
65
arch/mips/mips-boards/malta/malta_platform.c
Normal file
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@ -0,0 +1,65 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 MIPS Technologies, Inc.
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* written by Ralf Baechle (ralf@linux-mips.org)
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*
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* Probe driver for the Malta's UART ports:
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*
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* o 2 ports in the SMC SuperIO
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* o 1 port in the CBUS UART, a discrete 16550 which normally is only used
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* for bringups.
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*
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* We don't use 8250_platform.c on Malta as it would result in the CBUS
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* UART becoming ttyS0.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#define SMC_PORT(base, int) \
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{ \
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.iobase = base, \
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.irq = int, \
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.uartclk = 1843200, \
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.iotype = UPIO_PORT, \
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
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.regshift = 0, \
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}
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#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
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static struct plat_serial8250_port uart8250_data[] = {
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SMC_PORT(0x3F8, 4),
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SMC_PORT(0x2F8, 3),
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{
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.mapbase = 0x1f000900, /* The CBUS UART */
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.irq = MIPS_CPU_IRQ_BASE + 2,
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.uartclk = 3686400, /* Twice the usual clk! */
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.iotype = UPIO_MEM32,
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.flags = CBUS_UART_FLAGS,
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.regshift = 3,
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},
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM2,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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return platform_device_register(&uart8250_device);
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}
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module_init(uart8250_init);
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("8250 UART probe driver for the Malta CBUS UART");
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@ -1,8 +1,19 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2006, 07 Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2007 Dale Farnsworth (dale@farnsworth.org)
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*/
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#include <linux/delay.h>
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#include <linux/if_ether.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/mv643xx.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include "ocelot_3_fpga.h"
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@ -206,3 +217,36 @@ static int __init mv643xx_eth_add_pds(void)
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device_initcall(mv643xx_eth_add_pds);
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#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
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#define OCELOT3_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
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static struct plat_serial8250_port uart8250_data[] = {
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{
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.membase = (signed long) 0xfd000020,
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.irq = 6,
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.uartclk = 20000000,
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.iotype = UPIO_MEM,
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.flags = OCELOT3_UART_FLAGS,
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.regshift = 2,
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},
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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return platform_device_register(&uart8250_device);
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}
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module_init(uart8250_init);
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("8250 UART probe driver for the Ocelot 3");
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|
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@ -1,5 +1,53 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
|
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* License. See the file "COPYING" in the main directory of this archive
|
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* for more details.
|
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*
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* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <asm/ip32/mace.h>
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#include <asm/ip32/ip32_ints.h>
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/*
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* .iobase isn't a constant (in the sense of C) so we fill it in at runtime.
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*/
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#define MACE_PORT(int) \
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{ \
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.irq = int, \
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.uartclk = 1843200, \
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.iotype = UPIO_MEM, \
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.flags = UPF_SKIP_TEST, \
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.regshift = 8, \
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}
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static struct plat_serial8250_port uart8250_data[] = {
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MACE_PORT(MACEISA_SERIAL1_IRQ),
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MACE_PORT(MACEISA_SERIAL2_IRQ),
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{ },
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};
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static struct platform_device uart8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = uart8250_data,
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},
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};
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static int __init uart8250_init(void)
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{
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uart8250_data[0].iobase = (unsigned long) &mace->isa.serial1;
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uart8250_data[1].iobase = (unsigned long) &mace->isa.serial1;
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return platform_device_register(&uart8250_device);
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}
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device_initcall(uart8250_init);
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static __init int meth_devinit(void)
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{
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@ -18,3 +66,7 @@ static __init int meth_devinit(void)
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}
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device_initcall(meth_devinit);
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
|
||||
|
|
|
|||
|
|
@ -62,12 +62,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SERIAL_8250
|
||||
#include <linux/tty.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/serial_core.h>
|
||||
#endif /* CONFIG_SERIAL_8250 */
|
||||
|
||||
/* An arbitrary time; this can be decreased if reliability looks good */
|
||||
#define WAIT_MS 10
|
||||
|
||||
|
|
@ -96,36 +90,6 @@ void __init plat_mem_setup(void)
|
|||
|
||||
board_time_init = ip32_time_init;
|
||||
|
||||
#ifdef CONFIG_SERIAL_8250
|
||||
{
|
||||
static struct uart_port o2_serial[2];
|
||||
|
||||
memset(o2_serial, 0, sizeof(o2_serial));
|
||||
o2_serial[0].type = PORT_16550A;
|
||||
o2_serial[0].line = 0;
|
||||
o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
|
||||
o2_serial[0].flags = UPF_SKIP_TEST;
|
||||
o2_serial[0].uartclk = 1843200;
|
||||
o2_serial[0].iotype = UPIO_MEM;
|
||||
o2_serial[0].membase = (char *)&mace->isa.serial1;
|
||||
o2_serial[0].fifosize = 14;
|
||||
/* How much to shift register offset by. Each UART register
|
||||
* is replicated over 256 byte space */
|
||||
o2_serial[0].regshift = 8;
|
||||
o2_serial[1].type = PORT_16550A;
|
||||
o2_serial[1].line = 1;
|
||||
o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
|
||||
o2_serial[1].flags = UPF_SKIP_TEST;
|
||||
o2_serial[1].uartclk = 1843200;
|
||||
o2_serial[1].iotype = UPIO_MEM;
|
||||
o2_serial[1].membase = (char *)&mace->isa.serial2;
|
||||
o2_serial[1].fifosize = 14;
|
||||
o2_serial[1].regshift = 8;
|
||||
|
||||
early_serial_setup(&o2_serial[0]);
|
||||
early_serial_setup(&o2_serial[1]);
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_SGI_O2MACE_ETH
|
||||
{
|
||||
char *mac = ArcGetEnvironmentVariable("eaddr");
|
||||
|
|
|
|||
|
|
@ -19,114 +19,4 @@
|
|||
*/
|
||||
#define BASE_BAUD (1843200 / 16)
|
||||
|
||||
/* Standard COM flags (except for COM4, because of the 8514 problem) */
|
||||
#ifdef CONFIG_SERIAL_DETECT_IRQ
|
||||
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
|
||||
#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
|
||||
#else
|
||||
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
|
||||
#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MACH_JAZZ
|
||||
#include <asm/jazz.h>
|
||||
|
||||
#ifndef CONFIG_OLIVETTI_M700
|
||||
/* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
|
||||
exactly which ones ... XXX */
|
||||
#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
|
||||
#else
|
||||
/* but the M700 isn't such a strange beast */
|
||||
#define JAZZ_BASE_BAUD BASE_BAUD
|
||||
#endif
|
||||
|
||||
#define _JAZZ_SERIAL_INIT(int, base) \
|
||||
{ .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
|
||||
.iomem_base = (u8 *) base, .iomem_reg_shift = 0, \
|
||||
.io_type = SERIAL_IO_MEM }
|
||||
#define JAZZ_SERIAL_PORT_DEFNS \
|
||||
_JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \
|
||||
_JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
|
||||
#else
|
||||
#define JAZZ_SERIAL_PORT_DEFNS
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
|
||||
#define STD_SERIAL_PORT_DEFNS \
|
||||
/* UART CLK PORT IRQ FLAGS */ \
|
||||
{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
|
||||
{ 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
|
||||
{ 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
|
||||
{ 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
|
||||
|
||||
#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
|
||||
#define STD_SERIAL_PORT_DEFNS
|
||||
#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
|
||||
|
||||
#ifdef CONFIG_MOMENCO_OCELOT_3
|
||||
#define OCELOT_3_BASE_BAUD ( 20000000 / 16 )
|
||||
#define OCELOT_3_SERIAL_IRQ 6
|
||||
#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
|
||||
|
||||
#define _OCELOT_3_SERIAL_INIT(int, base) \
|
||||
{ .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
|
||||
.flags = STD_COM_FLAGS, \
|
||||
.iomem_base = (u8 *) base, iomem_reg_shift: 2, \
|
||||
io_type: SERIAL_IO_MEM }
|
||||
|
||||
#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
|
||||
_OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
|
||||
#else
|
||||
#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MOMENCO_OCELOT
|
||||
/* Ordinary NS16552 duart with a 20MHz crystal. */
|
||||
#define OCELOT_BASE_BAUD ( 20000000 / 16 )
|
||||
|
||||
#define OCELOT_SERIAL1_IRQ 4
|
||||
#define OCELOT_SERIAL1_BASE 0xe0001020
|
||||
|
||||
#define _OCELOT_SERIAL_INIT(int, base) \
|
||||
{ .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
|
||||
.iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
|
||||
.io_type = SERIAL_IO_MEM }
|
||||
#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
|
||||
_OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
|
||||
#else
|
||||
#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DDB5477
|
||||
#include <asm/ddb5xxx/ddb5477.h>
|
||||
#define DDB5477_SERIAL_PORT_DEFNS \
|
||||
{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \
|
||||
.flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \
|
||||
.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \
|
||||
{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \
|
||||
.flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \
|
||||
.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
|
||||
#else
|
||||
#define DDB5477_SERIAL_PORT_DEFNS
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SGI_IP32
|
||||
/*
|
||||
* The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
|
||||
* They are initialized in ip32_setup
|
||||
*/
|
||||
#define IP32_SERIAL_PORT_DEFNS \
|
||||
{},{},
|
||||
#else
|
||||
#define IP32_SERIAL_PORT_DEFNS
|
||||
#endif /* CONFIG_SGI_IP32 */
|
||||
|
||||
#define SERIAL_PORT_DFNS \
|
||||
DDB5477_SERIAL_PORT_DEFNS \
|
||||
IP32_SERIAL_PORT_DEFNS \
|
||||
JAZZ_SERIAL_PORT_DEFNS \
|
||||
STD_SERIAL_PORT_DEFNS \
|
||||
MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
|
||||
MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
|
||||
|
||||
#endif /* _ASM_SERIAL_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user