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arm64: dts: Amlogic updates for v5.1

Browse Source 
- new board: G12a-based x96 max
 - G12a: add peripheral clock controller and clock measure support
 - s400: fix SD/eMMC max rate issues
 - s400: audio: add sp/dif in support
 - GX: support simplefb
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Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: Amlogic updates for v5.1
- new board: G12a-based x96 max
- G12a: add peripheral clock controller and clock measure support
- s400: fix SD/eMMC max rate issues
- s400: audio: add sp/dif in support
- GX: support simplefb

* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: meson: add g12a x96 max board
  dt-bindings: arm: amlogic: add amediatech x96-max bindings
  arm64: dts: meson: g12a: add peripheral clock controller
  arm64: dts: meson: g12a: add clk measure support
  arm64: dts: meson: axg: add clk measure support
  arm64: dts: meson: fix g12a buses
  arm64: dts: meson-axg: add efuse device
  arm64: dts: meson: s400: fix emmc maximum rate
  arm64: dts: meson: s400: enable sdr104 on sdio
  arm64: dts: meson-gx: add support for simplefb
  dt-bindings: meson: add specific simplefb bindings
  arm64: dts: meson-gx: Add canvas provider node to the vpu
  arm64: dts: meson-axg: s400: add spdifin to the sound card
  arm64: dts: meson-axg: s400: add spdif-dir codec
  arm64: dts: meson-axg: add spdifin

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2019-02-15 16:02:12 +01:00
commit e7b984912d
11 changed files with 192 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/arm/amlogic.txt
View File

@ -109,6 +109,7 @@ Board compatible values (alphabetically, grouped by SoC):
- "amlogic,s400" (Meson axg a113d)
- "amlogic,u200" (Meson g12a s905d2)
- "amediatech,x96-max" (Meson g12a s905x2)
Amlogic Meson Firmware registers Interface
------------------------------------------

33
Documentation/devicetree/bindings/display/amlogic,simple-framebuffer.txt Normal file
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@ -0,0 +1,33 @@
Meson specific Simple Framebuffer bindings
This binding documents meson specific extensions to the simple-framebuffer
bindings. The meson simplefb u-boot code relies on the devicetree containing
pre-populated simplefb nodes.
These extensions are intended so that u-boot can select the right node based
on which pipeline is being used. As such they are solely intended for
firmware / bootloader use, and the OS should ignore them.
Required properties:
- compatible: "amlogic,simple-framebuffer", "simple-framebuffer"
- amlogic,pipeline, one of:
"vpu-cvbs"
"vpu-hdmi"
Example:
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
simplefb_hdmi: framebuffer-hdmi {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-hdmi";
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
power-domains = <&pwrc_vpu>;
};
};

1
Documentation/devicetree/bindings/vendor-prefixes.txt
View File

@ -24,6 +24,7 @@ amarula Amarula Solutions
amazon Amazon.com, Inc.
amcc Applied Micro Circuits Corporation (APM, formally AMCC)
amd Advanced Micro Devices (AMD), Inc.
amediatech Shenzhen Amediatech Technology Co., Ltd
amlogic Amlogic, Inc.
ampire Ampire Co., Ltd.
ams AMS AG

1
arch/arm64/boot/dts/amlogic/Makefile
View File

@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb

30
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
View File

@ -95,6 +95,13 @@
sound-name-prefix = "MIC";
};
spdif_dir: audio-codec-4 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
status = "okay";
sound-name-prefix = "DIR";
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
@ -249,6 +256,9 @@
"TODDR_A IN 2", "TDMIN_C OUT",
"TODDR_B IN 2", "TDMIN_C OUT",
"TODDR_C IN 2", "TDMIN_C OUT",
"TODDR_A IN 3", "SPDIFIN Capture",
"TODDR_B IN 3", "SPDIFIN Capture",
"TODDR_C IN 3", "SPDIFIN Capture",
"TODDR_A IN 4", "PDM Capture",
"TODDR_B IN 4", "PDM Capture",
"TODDR_C IN 4", "PDM Capture",
@ -326,6 +336,14 @@
};
dai-link-8 {
sound-dai = <&spdifin>;
codec {
sound-dai = <&spdif_dir>;
};
};
dai-link-9 {
sound-dai = <&pdm>;
codec {
@ -446,7 +464,8 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
sd-uhs-sdr104;
max-frequency = <200000000>;
non-removable;
disable-wp;
@ -469,9 +488,8 @@
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <180000000>;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
@ -483,6 +501,12 @@
vqmmc-supply = <&vddio_boot>;
};
&spdifin {
pinctrl-0 = <&spdif_in_a19_pins>;
pinctrl-names = "default";
status = "okay";
};
&spdifout {
pinctrl-0 = <&spdif_out_a20_pins>;
pinctrl-names = "default";

25
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
View File

@ -111,6 +111,14 @@
compatible = "amlogic,meson-gxbb-sm";
};
efuse: efuse {
compatible = "amlogic,meson-gxbb-efuse";
clocks = <&clkc CLKID_EFUSE>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
@ -1260,6 +1268,18 @@
status = "disabled";
};
spdifin: audio-controller@400 {
compatible = "amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFIN";
interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
clock-names = "pclk", "refclk";
status = "disabled";
};
spdifout: audio-controller@480 {
compatible = "amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
@ -1590,6 +1610,11 @@
status = "disabled";
};
clk_msr: clock-measure@18000 {
compatible = "amlogic,meson-axg-clk-measure";
reg = <0x0 0x18000 0x0 0x10>;
};
i2c3: i2c@1c000 {
compatible = "amlogic,meson-axg-i2c";
reg = <0x0 0x1c000 0x0 0x20>;

28
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts Normal file
View File

@ -0,0 +1,28 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2018 BayLibre SAS. All rights reserved.
*/
/dts-v1/;
#include "meson-g12a.dtsi"
/ {
compatible = "amediatech,x96-max", "amlogic,u200", "amlogic,g12a";
model = "Shenzhen Amediatech Technology Co., Ltd X96 Max";
aliases {
serial0 = &uart_AO;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
};
&uart_AO {
status = "okay";
};

62
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
View File

@ -78,20 +78,41 @@
#size-cells = <2>;
ranges;
periphs: periphs@ff634000 {
apb: bus@ff600000 {
compatible = "simple-bus";
reg = <0x0 0xff634000 0x0 0x2000>;
reg = <0x0 0xff600000 0x0 0x200000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
};
ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
hiubus: bus@ff63c000 {
compatible = "simple-bus";
reg = <0x0 0xff63c000 0x0 0x1c00>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
periphs: bus@34400 {
compatible = "simple-bus";
reg = <0x0 0x34400 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
};
hiu: bus@3c000 {
compatible = "simple-bus";
reg = <0x0 0x3c000 0x0 0x1400>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
hhi: system-controller@0 {
compatible = "amlogic,meson-gx-hhi-sysctrl",
"simple-mfd", "syscon";
reg = <0 0 0 0x400>;
clkc: clock-controller {
compatible = "amlogic,g12a-clkc";
#clock-cells = <1>;
clocks = <&xtal>;
clock-names = "xtal";
};
};
};
};
aobus: bus@ff800000 {
@ -102,7 +123,8 @@
ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
uart_AO: serial@3000 {
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x3000 0x0 0x18>;
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
@ -111,7 +133,8 @@
};
uart_AO_B: serial@4000 {
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x4000 0x0 0x18>;
interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
@ -135,18 +158,15 @@
cbus: bus@ffd00000 {
compatible = "simple-bus";
reg = <0x0 0xffd00000 0x0 0x25000>;
reg = <0x0 0xffd00000 0x0 0x100000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
};
ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
apb: apb@ffe00000 {
compatible = "simple-bus";
reg = <0x0 0xffe00000 0x0 0x200000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
clk_msr: clock-measure@18000 {
compatible = "amlogic,meson-g12a-clk-measure";
reg = <0x0 0x18000 0x0 0x10>;
};
};
};

23
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
View File

@ -50,6 +50,28 @@
};
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
simplefb_cvbs: framebuffer-cvbs {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-cvbs";
power-domains = <&pwrc_vpu>;
status = "disabled";
};
simplefb_hdmi: framebuffer-hdmi {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-hdmi";
power-domains = <&pwrc_vpu>;
status = "disabled";
};
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
@ -510,6 +532,7 @@
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
amlogic,canvas = <&canvas>;
/* CVBS VDAC output port */
cvbs_vdac_port: port@0 {

6
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
View File

@ -784,6 +784,12 @@
resets = <&reset RESET_SD_EMMC_C>;
};
&simplefb_hdmi {
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
};
&spicc {
clocks = <&clkc CLKID_SPICC>;
clock-names = "core";

6
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
View File

@ -787,6 +787,12 @@
resets = <&reset RESET_SD_EMMC_C>;
};
&simplefb_hdmi {
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
};
&spicc {
clocks = <&clkc CLKID_SPICC>;
clock-names = "core";