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mmc: sdhci-esdhc-imx: handle 'auto-cmd23-broken' from devicetree

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Since L4.15, community involve the commit 105819c8a5 ("mmc: core: use mrq->sbc
when sending CMD23 for RPMB"), let the usdhc to decide whether to use ACMD23 for
RPMB. This CMD23 for RPMB need to set the bit 31 to its argument, if not, the
RPMB write operation will return general fail.

According to the sdhci logic, SDMA mode will disable the ACMD23, and only in
ADMA mode, it will chose to use ACMD23 if the host support. But according to
debug, and confirm with IC, the imx6qpdl/imx6sx/imx6sl/imx7d do not support
the ACMD23 feature completely. These SoCs only use the 16 bit block count of
the register 0x4 (BLOCK_ATT) as the CMD23's argument in ACMD23 mode, which
means it will ignore the upper 16 bit of the CMD23's argument. This will block
the reliable write operation in RPMB, because RPMB reliable write need to set
the bit31 of the CMD23's argument. This is the hardware limitation. Due to
imx6sl use SDMA, so for imx6qpdl/imx6sx/imx7d, it need to broke the ACMD23 for
eMMC, SD card do not has this limitation, because SD card do not support reliable
write.

For imx6ul/imx6ull/imx6sll/imx7ulp/imx8, it support the ACMD23 completely, it
change to use the 0x0 register (DS_ADDR) to put the CMD23's argument in ADMA mode.

This patch handle 'auto-cmd23-broken' from devicetree.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
This commit is contained in:
Haibo Chen 2019-08-06 20:17:54 +08:00 committed by Dong Aisheng
parent 2ca5aef528
commit e41d4f9835
2 changed files with 11 additions and 0 deletions
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8
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
View File

@ -44,6 +44,14 @@ Optional properties:
property allows user to change the delay target for the strobe input read clock.
If not use this property, driver default set the delay target to value 7.
Only eMMC HS400 mode need to take care of this property.
- auto-cmd23-broken: disable the ACMD23 function of USDHC.
This is required for eMMC on imx6qpdl/imx6sx/imx7d when it use ADMA mode. Because
for these SoC, it do not support the ACMD23 completely, only take the 16 bit block
count from the 0x4 register (BLK_ATT) as argument for the ACMD23, the upper 16 bit
of the CMD23's argument is ignored. This will impact the reliable write operation
and the RPMB block write operation, because these operations need to set the bit 31
of the CMD23's argument. SDMA mode will default disable the ACMD23 mode. SD card do
not has this limitation on these SoCs.
Examples:

3
drivers/mmc/host/sdhci-esdhc-imx.c
View File

@ -1365,6 +1365,9 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
if (of_find_property(np, "no-1-8-v", NULL))
host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
if (of_find_property(np, "auto-cmd23-broken", NULL))
host->quirks2 |= SDHCI_QUIRK2_ACMD23_BROKEN;
if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
boarddata->delay_line = 0;