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ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches

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The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.

Fixes: 2c3de36700 ("ARM: dts: r8a7790: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2017-03-06 17:40:39 +01:00 committed by Simon Horman
parent 51c00a9f73
commit d492909c84
1 changed files with 2 additions and 4 deletions
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6
arch/arm/boot/dts/r8a7790.dtsi
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@ -129,17 +129,15 @@
next-level-cache = <&L2_CA7>;
};
L2_CA15: cache-controller@0 {
L2_CA15: cache-controller-0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7790_PD_CA15_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA7: cache-controller@100 {
L2_CA7: cache-controller-1 {
compatible = "cache";
reg = <0x100>;
power-domains = <&sysc R8A7790_PD_CA7_SCU>;
cache-unified;
cache-level = <2>;