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drm/amd/display: Fix time out on boot 

On boot, hubp 0 is powergated during enable accel mode, so we time out
when we try to blank in undo wa.

Fix: Check power gate status before set blank

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Yang 2017-08-28 16:50:17 -04:00 committed by Alex Deucher
parent ab8db3e165
commit c9bb686b59
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@ -780,6 +780,12 @@ static void undo_DEGVIDCN10_253_wa(struct dc *dc)
{
struct dce_hwseq *hws = dc->hwseq;
struct mem_input *mi = dc->res_pool->mis[0];
int pwr_status = 0;
REG_GET(DOMAIN0_PG_STATUS, DOMAIN0_PGFSM_PWR_STATUS, &pwr_status);
/* Don't need to blank if hubp is power gated*/
if (pwr_status == 2)
return;
mi->funcs->set_blank(mi, true);