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dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values

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Document the Tegra SDHCI inbound and outbound sampling trimmer values.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Aapo Vienamo 2018-08-30 18:06:05 +03:00 committed by Ulf Hansson
parent 1dd2a75809
commit b7783cfbd1
1 changed files with 11 additions and 0 deletions
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Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
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@ -67,6 +67,10 @@ Optional properties for Tegra210 and Tegra186:
- nvidia,pad-autocal-pull-up-offset-hs400,
nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength
calibration offsets for HS400 mode.
- nvidia,default-tap : Specify the default inbound sampling clock
trimmer value for non-tunable modes.
- nvidia,default-trim : Specify the default outbound clock trimmer
value.
Notes on the pad calibration pull up and pulldown offset values:
- The property values are drive codes which are programmed into the
@ -77,6 +81,13 @@ Optional properties for Tegra210 and Tegra186:
- The SDR104 and HS400 timing specific values are used in
corresponding modes if specified.
Notes on tap and trim values:
- The values are used for compensating trace length differences
by adjusting the sampling point.
- The values are programmed to the Vendor Clock Control Register.
Please refer to the reference manual of the SoC for correct
values.
Example:
sdhci@700b0000 {
compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";