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dt-bindings: display: fsl-imx-drm: Add i.MX8 PRG(Prefetch Resolve Gasket) support
The Pretch Resolve Gasket(PRG) is a digital core function as a gasket interface between RTRAM controller and DPU. The main function of PRG is to convert the AXI interface to RTRAM interface and remapping the ARADDR to a RTRAM address. This patch adds device tree binding doc support for i.MX8qm/qxp PRG. Signed-off-by: Liu Ying <victor.liu@nxp.com>
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@ -246,6 +246,28 @@ dpu: dpu@56180000 {
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};
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};
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Freescale i.MX8 PRG (Prefetch Resolve Gasket)
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=============================================
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Required properties:
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- compatible: should be "fsl,<chip>-prg"
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- reg: should be register base and length as documented in the
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datasheet
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- clocks: phandles to the PRG apb and rtram clocks, as described in
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Documentation/devicetree/bindings/clock/clock-bindings.txt and
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Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt.
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- clock-names: should be "apb" and "rtram"
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- power-domains: phandle pointing to power domain
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example:
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prg@56040000 {
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compatible = "fsl,imx8qm-prg";
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reg = <0x56040000 0x10000>;
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clocks = <&dc0_prg0_lpcg 0>, <&dc0_prg0_lpcg 1>;
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clock-names = "apb", "rtram";
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power-domains = <&pd IMX_SC_R_DC_0>;
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};
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Parallel display support
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========================
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