dt-bindings: display: fsl-imx-drm: Add i.MX8 PRG(Prefetch Resolve Gasket) support

The Pretch Resolve Gasket(PRG) is a digital core function as a gasket
interface between RTRAM controller and DPU.  The main function of PRG
is to convert the AXI interface to RTRAM interface and remapping the
ARADDR to a RTRAM address.  This patch adds device tree binding doc
support for i.MX8qm/qxp PRG.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
This commit is contained in:
Liu Ying 2017-07-03 11:35:52 +08:00 committed by Dong Aisheng
parent a571b89dea
commit b76ebc473b

View File

@ -246,6 +246,28 @@ dpu: dpu@56180000 {
};
};
Freescale i.MX8 PRG (Prefetch Resolve Gasket)
=============================================
Required properties:
- compatible: should be "fsl,<chip>-prg"
- reg: should be register base and length as documented in the
datasheet
- clocks: phandles to the PRG apb and rtram clocks, as described in
Documentation/devicetree/bindings/clock/clock-bindings.txt and
Documentation/devicetree/bindings/clock/imx8qxp-lpcg.txt.
- clock-names: should be "apb" and "rtram"
- power-domains: phandle pointing to power domain
example:
prg@56040000 {
compatible = "fsl,imx8qm-prg";
reg = <0x56040000 0x10000>;
clocks = <&dc0_prg0_lpcg 0>, <&dc0_prg0_lpcg 1>;
clock-names = "apb", "rtram";
power-domains = <&pd IMX_SC_R_DC_0>;
};
Parallel display support
========================