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drm/amd/display/dc: set num-dwb = 1 as navi10 asic cap

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during navi10 bring up, dwb causes system hang.
to continue debug major issue, disable dwb by
set num-dwb = 0. the hang issue is not reproduced now
by enable num-dwb =1. dc source is shared by all os.
win needs num-dwb = 1.

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
hersen wu 2019-05-23 18:49:39 -04:00 committed by Alex Deucher
parent 170a2398d2
commit 9cbee6eff8
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
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@ -661,7 +661,7 @@ static const struct resource_caps res_cap_nv10 = {
.num_audio = 7,
.num_stream_encoder = 6,
.num_pll = 6,
.num_dwb = 0,
.num_dwb = 1,
.num_ddc = 6,
.num_vmid = 16,
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT