This is the 4.14.110 stable release
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This commit is contained in:
commit
8ae3c87745
|
@ -1011,7 +1011,7 @@
|
|||
earlyprintk=serial[,0x...[,baudrate]]
|
||||
earlyprintk=ttySn[,baudrate]
|
||||
earlyprintk=dbgp[debugController#]
|
||||
earlyprintk=pciserial,bus:device.function[,baudrate]
|
||||
earlyprintk=pciserial[,force],bus:device.function[,baudrate]
|
||||
earlyprintk=xdbc[xhciController#]
|
||||
|
||||
earlyprintk is useful when the kernel crashes before
|
||||
|
@ -1043,6 +1043,10 @@
|
|||
|
||||
The sclp output can only be used on s390.
|
||||
|
||||
The optional "force" to "pciserial" enables use of a
|
||||
PCI device even when its classcode is not of the
|
||||
UART class.
|
||||
|
||||
edac_report= [HW,EDAC] Control how to report EDAC event
|
||||
Format: {"on" | "off" | "force"}
|
||||
on: enable EDAC to report H/W event. May be overridden
|
||||
|
@ -1961,6 +1965,9 @@
|
|||
off
|
||||
Disables hypervisor mitigations and doesn't
|
||||
emit any warnings.
|
||||
It also drops the swap size and available
|
||||
RAM limit restriction on both hypervisor and
|
||||
bare metal.
|
||||
|
||||
Default is 'flush'.
|
||||
|
||||
|
@ -3990,9 +3997,13 @@
|
|||
|
||||
spectre_v2= [X86] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability.
|
||||
The default operation protects the kernel from
|
||||
user space attacks.
|
||||
|
||||
on - unconditionally enable
|
||||
off - unconditionally disable
|
||||
on - unconditionally enable, implies
|
||||
spectre_v2_user=on
|
||||
off - unconditionally disable, implies
|
||||
spectre_v2_user=off
|
||||
auto - kernel detects whether your CPU model is
|
||||
vulnerable
|
||||
|
||||
|
@ -4002,6 +4013,12 @@
|
|||
CONFIG_RETPOLINE configuration option, and the
|
||||
compiler with which the kernel was built.
|
||||
|
||||
Selecting 'on' will also enable the mitigation
|
||||
against user space to user space task attacks.
|
||||
|
||||
Selecting 'off' will disable both the kernel and
|
||||
the user space protections.
|
||||
|
||||
Specific mitigations can also be selected manually:
|
||||
|
||||
retpoline - replace indirect branches
|
||||
|
@ -4011,6 +4028,48 @@
|
|||
Not specifying this option is equivalent to
|
||||
spectre_v2=auto.
|
||||
|
||||
spectre_v2_user=
|
||||
[X86] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability between
|
||||
user space tasks
|
||||
|
||||
on - Unconditionally enable mitigations. Is
|
||||
enforced by spectre_v2=on
|
||||
|
||||
off - Unconditionally disable mitigations. Is
|
||||
enforced by spectre_v2=off
|
||||
|
||||
prctl - Indirect branch speculation is enabled,
|
||||
but mitigation can be enabled via prctl
|
||||
per thread. The mitigation control state
|
||||
is inherited on fork.
|
||||
|
||||
prctl,ibpb
|
||||
- Like "prctl" above, but only STIBP is
|
||||
controlled per thread. IBPB is issued
|
||||
always when switching between different user
|
||||
space processes.
|
||||
|
||||
seccomp
|
||||
- Same as "prctl" above, but all seccomp
|
||||
threads will enable the mitigation unless
|
||||
they explicitly opt out.
|
||||
|
||||
seccomp,ibpb
|
||||
- Like "seccomp" above, but only STIBP is
|
||||
controlled per thread. IBPB is issued
|
||||
always when switching between different
|
||||
user space processes.
|
||||
|
||||
auto - Kernel selects the mitigation depending on
|
||||
the available CPU features and vulnerability.
|
||||
|
||||
Default mitigation:
|
||||
If CONFIG_SECCOMP=y then "seccomp", otherwise "prctl"
|
||||
|
||||
Not specifying this option is equivalent to
|
||||
spectre_v2_user=auto.
|
||||
|
||||
spec_store_bypass_disable=
|
||||
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
|
||||
(Speculative Store Bypass vulnerability)
|
||||
|
|
|
@ -405,6 +405,9 @@ time with the option "l1tf=". The valid arguments for this option are:
|
|||
|
||||
off Disables hypervisor mitigations and doesn't emit any
|
||||
warnings.
|
||||
It also drops the swap size and available RAM limit restrictions
|
||||
on both hypervisor and bare metal.
|
||||
|
||||
============ =============================================================
|
||||
|
||||
The default is 'flush'. For details about L1D flushing see :ref:`l1d_flush`.
|
||||
|
@ -576,7 +579,8 @@ Default mitigations
|
|||
The kernel default mitigations for vulnerable processors are:
|
||||
|
||||
- PTE inversion to protect against malicious user space. This is done
|
||||
unconditionally and cannot be controlled.
|
||||
unconditionally and cannot be controlled. The swap storage is limited
|
||||
to ~16TB.
|
||||
|
||||
- L1D conditional flushing on VMENTER when EPT is enabled for
|
||||
a guest.
|
||||
|
|
|
@ -6,7 +6,8 @@ Required properties:
|
|||
|
||||
"atmel,24c00", "atmel,24c01", "atmel,24c02", "atmel,24c04",
|
||||
"atmel,24c08", "atmel,24c16", "atmel,24c32", "atmel,24c64",
|
||||
"atmel,24c128", "atmel,24c256", "atmel,24c512", "atmel,24c1024"
|
||||
"atmel,24c128", "atmel,24c256", "atmel,24c512", "atmel,24c1024",
|
||||
"atmel,24c2048"
|
||||
|
||||
"catalyst,24c32"
|
||||
|
||||
|
@ -23,7 +24,7 @@ Required properties:
|
|||
device with <type> and manufacturer "atmel" should be used.
|
||||
Possible types are:
|
||||
"24c00", "24c01", "24c02", "24c04", "24c08", "24c16", "24c32", "24c64",
|
||||
"24c128", "24c256", "24c512", "24c1024", "spd"
|
||||
"24c128", "24c256", "24c512", "24c1024", "24c2048", "spd"
|
||||
|
||||
- reg : the I2C address of the EEPROM
|
||||
|
||||
|
|
|
@ -18,7 +18,7 @@ Example:
|
|||
reg = <1>;
|
||||
clocks = <&clk32m>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <13 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
vdd-supply = <®5v0>;
|
||||
xceiver-supply = <®5v0>;
|
||||
};
|
||||
|
|
|
@ -494,7 +494,9 @@ manner. The codes are the following:
|
|||
|
||||
Note that there is no guarantee that every flag and associated mnemonic will
|
||||
be present in all further kernel releases. Things get changed, the flags may
|
||||
be vanished or the reverse -- new added.
|
||||
be vanished or the reverse -- new added. Interpretation of their meaning
|
||||
might change in future as well. So each consumer of these flags has to
|
||||
follow each specific kernel version for the exact semantic.
|
||||
|
||||
This file is only present if the CONFIG_MMU kernel configuration option is
|
||||
enabled.
|
||||
|
|
|
@ -226,16 +226,6 @@ xvYCC
|
|||
|
||||
:author: International Electrotechnical Commission (http://www.iec.ch)
|
||||
|
||||
.. _adobergb:
|
||||
|
||||
AdobeRGB
|
||||
========
|
||||
|
||||
|
||||
:title: Adobe© RGB (1998) Color Image Encoding Version 2005-05
|
||||
|
||||
:author: Adobe Systems Incorporated (http://www.adobe.com)
|
||||
|
||||
.. _oprgb:
|
||||
|
||||
opRGB
|
||||
|
|
|
@ -51,8 +51,8 @@ whole range, 0-255, dividing the angular value by 1.41. The enum
|
|||
- See :ref:`col-rec709`.
|
||||
* - ``V4L2_COLORSPACE_SRGB``
|
||||
- See :ref:`col-srgb`.
|
||||
* - ``V4L2_COLORSPACE_ADOBERGB``
|
||||
- See :ref:`col-adobergb`.
|
||||
* - ``V4L2_COLORSPACE_OPRGB``
|
||||
- See :ref:`col-oprgb`.
|
||||
* - ``V4L2_COLORSPACE_BT2020``
|
||||
- See :ref:`col-bt2020`.
|
||||
* - ``V4L2_COLORSPACE_DCI_P3``
|
||||
|
@ -90,8 +90,8 @@ whole range, 0-255, dividing the angular value by 1.41. The enum
|
|||
- Use the Rec. 709 transfer function.
|
||||
* - ``V4L2_XFER_FUNC_SRGB``
|
||||
- Use the sRGB transfer function.
|
||||
* - ``V4L2_XFER_FUNC_ADOBERGB``
|
||||
- Use the AdobeRGB transfer function.
|
||||
* - ``V4L2_XFER_FUNC_OPRGB``
|
||||
- Use the opRGB transfer function.
|
||||
* - ``V4L2_XFER_FUNC_SMPTE240M``
|
||||
- Use the SMPTE 240M transfer function.
|
||||
* - ``V4L2_XFER_FUNC_NONE``
|
||||
|
|
|
@ -290,15 +290,14 @@ Y' is clamped to the range [0…1] and Cb and Cr are clamped to the range
|
|||
170M/BT.601. The Y'CbCr quantization is limited range.
|
||||
|
||||
|
||||
.. _col-adobergb:
|
||||
.. _col-oprgb:
|
||||
|
||||
Colorspace Adobe RGB (V4L2_COLORSPACE_ADOBERGB)
|
||||
Colorspace opRGB (V4L2_COLORSPACE_OPRGB)
|
||||
===============================================
|
||||
|
||||
The :ref:`adobergb` standard defines the colorspace used by computer
|
||||
graphics that use the AdobeRGB colorspace. This is also known as the
|
||||
:ref:`oprgb` standard. The default transfer function is
|
||||
``V4L2_XFER_FUNC_ADOBERGB``. The default Y'CbCr encoding is
|
||||
The :ref:`oprgb` standard defines the colorspace used by computer
|
||||
graphics that use the opRGB colorspace. The default transfer function is
|
||||
``V4L2_XFER_FUNC_OPRGB``. The default Y'CbCr encoding is
|
||||
``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is limited
|
||||
range.
|
||||
|
||||
|
@ -312,7 +311,7 @@ The chromaticities of the primary colors and the white reference are:
|
|||
|
||||
.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
|
||||
|
||||
.. flat-table:: Adobe RGB Chromaticities
|
||||
.. flat-table:: opRGB Chromaticities
|
||||
:header-rows: 1
|
||||
:stub-columns: 0
|
||||
:widths: 1 1 2
|
||||
|
|
|
@ -34,7 +34,9 @@ Currently, these files are in /proc/sys/fs:
|
|||
- overflowgid
|
||||
- pipe-user-pages-hard
|
||||
- pipe-user-pages-soft
|
||||
- protected_fifos
|
||||
- protected_hardlinks
|
||||
- protected_regular
|
||||
- protected_symlinks
|
||||
- suid_dumpable
|
||||
- super-max
|
||||
|
@ -182,6 +184,24 @@ applied.
|
|||
|
||||
==============================================================
|
||||
|
||||
protected_fifos:
|
||||
|
||||
The intent of this protection is to avoid unintentional writes to
|
||||
an attacker-controlled FIFO, where a program expected to create a regular
|
||||
file.
|
||||
|
||||
When set to "0", writing to FIFOs is unrestricted.
|
||||
|
||||
When set to "1" don't allow O_CREAT open on FIFOs that we don't own
|
||||
in world writable sticky directories, unless they are owned by the
|
||||
owner of the directory.
|
||||
|
||||
When set to "2" it also applies to group writable sticky directories.
|
||||
|
||||
This protection is based on the restrictions in Openwall.
|
||||
|
||||
==============================================================
|
||||
|
||||
protected_hardlinks:
|
||||
|
||||
A long-standing class of security issues is the hardlink-based
|
||||
|
@ -202,6 +222,22 @@ This protection is based on the restrictions in Openwall and grsecurity.
|
|||
|
||||
==============================================================
|
||||
|
||||
protected_regular:
|
||||
|
||||
This protection is similar to protected_fifos, but it
|
||||
avoids writes to an attacker-controlled regular file, where a program
|
||||
expected to create one.
|
||||
|
||||
When set to "0", writing to regular files is unrestricted.
|
||||
|
||||
When set to "1" don't allow O_CREAT open on regular files that we
|
||||
don't own in world writable sticky directories, unless they are
|
||||
owned by the owner of the directory.
|
||||
|
||||
When set to "2" it also applies to group writable sticky directories.
|
||||
|
||||
==============================================================
|
||||
|
||||
protected_symlinks:
|
||||
|
||||
A long-standing class of security issues is the symlink-based
|
||||
|
|
|
@ -92,3 +92,12 @@ Speculation misfeature controls
|
|||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_FORCE_DISABLE, 0, 0);
|
||||
|
||||
- PR_SPEC_INDIR_BRANCH: Indirect Branch Speculation in User Processes
|
||||
(Mitigate Spectre V2 style attacks against user processes)
|
||||
|
||||
Invocations:
|
||||
* prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, 0, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_ENABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_DISABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_FORCE_DISABLE, 0, 0);
|
||||
|
|
|
@ -13,7 +13,7 @@ of a virtual machine. The ioctls belong to three classes
|
|||
|
||||
- VM ioctls: These query and set attributes that affect an entire virtual
|
||||
machine, for example memory layout. In addition a VM ioctl is used to
|
||||
create virtual cpus (vcpus).
|
||||
create virtual cpus (vcpus) and devices.
|
||||
|
||||
Only run VM ioctls from the same process (address space) that was used
|
||||
to create the VM.
|
||||
|
@ -24,6 +24,11 @@ of a virtual machine. The ioctls belong to three classes
|
|||
Only run vcpu ioctls from the same thread that was used to create the
|
||||
vcpu.
|
||||
|
||||
- device ioctls: These query and set attributes that control the operation
|
||||
of a single device.
|
||||
|
||||
device ioctls must be issued from the same process (address space) that
|
||||
was used to create the VM.
|
||||
|
||||
2. File descriptors
|
||||
-------------------
|
||||
|
@ -32,10 +37,11 @@ The kvm API is centered around file descriptors. An initial
|
|||
open("/dev/kvm") obtains a handle to the kvm subsystem; this handle
|
||||
can be used to issue system ioctls. A KVM_CREATE_VM ioctl on this
|
||||
handle will create a VM file descriptor which can be used to issue VM
|
||||
ioctls. A KVM_CREATE_VCPU ioctl on a VM fd will create a virtual cpu
|
||||
and return a file descriptor pointing to it. Finally, ioctls on a vcpu
|
||||
fd can be used to control the vcpu, including the important task of
|
||||
actually running guest code.
|
||||
ioctls. A KVM_CREATE_VCPU or KVM_CREATE_DEVICE ioctl on a VM fd will
|
||||
create a virtual cpu or device and return a file descriptor pointing to
|
||||
the new resource. Finally, ioctls on a vcpu or device fd can be used
|
||||
to control the vcpu or device. For vcpus, this includes the important
|
||||
task of actually running guest code.
|
||||
|
||||
In general file descriptors can be migrated among processes by means
|
||||
of fork() and the SCM_RIGHTS facility of unix domain socket. These
|
||||
|
|
|
@ -4,8 +4,9 @@ Virtual memory map with 4 level page tables:
|
|||
0000000000000000 - 00007fffffffffff (=47 bits) user space, different per mm
|
||||
hole caused by [47:63] sign extension
|
||||
ffff800000000000 - ffff87ffffffffff (=43 bits) guard hole, reserved for hypervisor
|
||||
ffff880000000000 - ffffc7ffffffffff (=64 TB) direct mapping of all phys. memory
|
||||
ffffc80000000000 - ffffc8ffffffffff (=40 bits) hole
|
||||
ffff880000000000 - ffff887fffffffff (=39 bits) LDT remap for PTI
|
||||
ffff888000000000 - ffffc87fffffffff (=64 TB) direct mapping of all phys. memory
|
||||
ffffc88000000000 - ffffc8ffffffffff (=39 bits) hole
|
||||
ffffc90000000000 - ffffe8ffffffffff (=45 bits) vmalloc/ioremap space
|
||||
ffffe90000000000 - ffffe9ffffffffff (=40 bits) hole
|
||||
ffffea0000000000 - ffffeaffffffffff (=40 bits) virtual memory map (1TB)
|
||||
|
@ -30,8 +31,9 @@ Virtual memory map with 5 level page tables:
|
|||
0000000000000000 - 00ffffffffffffff (=56 bits) user space, different per mm
|
||||
hole caused by [56:63] sign extension
|
||||
ff00000000000000 - ff0fffffffffffff (=52 bits) guard hole, reserved for hypervisor
|
||||
ff10000000000000 - ff8fffffffffffff (=55 bits) direct mapping of all phys. memory
|
||||
ff90000000000000 - ff9fffffffffffff (=52 bits) LDT remap for PTI
|
||||
ff10000000000000 - ff10ffffffffffff (=48 bits) LDT remap for PTI
|
||||
ff11000000000000 - ff90ffffffffffff (=55 bits) direct mapping of all phys. memory
|
||||
ff91000000000000 - ff9fffffffffffff (=3840 TB) hole
|
||||
ffa0000000000000 - ffd1ffffffffffff (=54 bits) vmalloc/ioremap space (12800 TB)
|
||||
ffd2000000000000 - ffd3ffffffffffff (=49 bits) hole
|
||||
ffd4000000000000 - ffd5ffffffffffff (=49 bits) virtual memory map (512TB)
|
||||
|
|
|
@ -12662,6 +12662,7 @@ F: arch/alpha/kernel/srm_env.c
|
|||
|
||||
STABLE BRANCH
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
M: Sasha Levin <sashal@kernel.org>
|
||||
L: stable@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/process/stable-kernel-rules.rst
|
||||
|
|
34
Makefile
34
Makefile
|
@ -1,7 +1,7 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 4
|
||||
PATCHLEVEL = 14
|
||||
SUBLEVEL = 78
|
||||
SUBLEVEL = 110
|
||||
EXTRAVERSION =
|
||||
NAME = Petit Gorille
|
||||
|
||||
|
@ -479,14 +479,18 @@ endif
|
|||
|
||||
ifeq ($(cc-name),clang)
|
||||
ifneq ($(CROSS_COMPILE),)
|
||||
CLANG_TARGET := --target=$(notdir $(CROSS_COMPILE:%-=%))
|
||||
GCC_TOOLCHAIN := $(realpath $(dir $(shell which $(LD)))/..)
|
||||
CLANG_FLAGS := --target=$(notdir $(CROSS_COMPILE:%-=%))
|
||||
GCC_TOOLCHAIN_DIR := $(dir $(shell which $(LD)))
|
||||
CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR)
|
||||
GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..)
|
||||
endif
|
||||
ifneq ($(GCC_TOOLCHAIN),)
|
||||
CLANG_GCC_TC := --gcc-toolchain=$(GCC_TOOLCHAIN)
|
||||
CLANG_FLAGS += --gcc-toolchain=$(GCC_TOOLCHAIN)
|
||||
endif
|
||||
KBUILD_CFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC)
|
||||
KBUILD_AFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC)
|
||||
CLANG_FLAGS += -no-integrated-as
|
||||
KBUILD_CFLAGS += $(CLANG_FLAGS)
|
||||
KBUILD_AFLAGS += $(CLANG_FLAGS)
|
||||
export CLANG_FLAGS
|
||||
endif
|
||||
|
||||
RETPOLINE_CFLAGS_GCC := -mindirect-branch=thunk-extern -mindirect-branch-register
|
||||
|
@ -721,8 +725,6 @@ KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare)
|
|||
# See modpost pattern 2
|
||||
KBUILD_CFLAGS += $(call cc-option, -mno-global-merge,)
|
||||
KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior)
|
||||
KBUILD_CFLAGS += $(call cc-option, -no-integrated-as)
|
||||
KBUILD_AFLAGS += $(call cc-option, -no-integrated-as)
|
||||
else
|
||||
|
||||
# These warnings generated too much noise in a regular build.
|
||||
|
@ -801,6 +803,9 @@ KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
|
|||
# disable pointer signed / unsigned warnings in gcc 4.0
|
||||
KBUILD_CFLAGS += $(call cc-disable-warning, pointer-sign)
|
||||
|
||||
# disable stringop warnings in gcc 8+
|
||||
KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation)
|
||||
|
||||
# disable invalid "can't wrap" optimizations for signed / pointers
|
||||
KBUILD_CFLAGS += $(call cc-option,-fno-strict-overflow)
|
||||
|
||||
|
@ -949,11 +954,6 @@ ifdef CONFIG_STACK_VALIDATION
|
|||
ifeq ($(has_libelf),1)
|
||||
objtool_target := tools/objtool FORCE
|
||||
else
|
||||
ifdef CONFIG_UNWINDER_ORC
|
||||
$(error "Cannot generate ORC metadata for CONFIG_UNWINDER_ORC=y, please install libelf-dev, libelf-devel or elfutils-libelf-devel")
|
||||
else
|
||||
$(warning "Cannot use CONFIG_STACK_VALIDATION=y, please install libelf-dev, libelf-devel or elfutils-libelf-devel")
|
||||
endif
|
||||
SKIP_STACK_VALIDATION := 1
|
||||
export SKIP_STACK_VALIDATION
|
||||
endif
|
||||
|
@ -1097,6 +1097,14 @@ uapi-asm-generic:
|
|||
|
||||
PHONY += prepare-objtool
|
||||
prepare-objtool: $(objtool_target)
|
||||
ifeq ($(SKIP_STACK_VALIDATION),1)
|
||||
ifdef CONFIG_UNWINDER_ORC
|
||||
@echo "error: Cannot generate ORC metadata for CONFIG_UNWINDER_ORC=y, please install libelf-dev, libelf-devel or elfutils-libelf-devel" >&2
|
||||
@false
|
||||
else
|
||||
@echo "warning: Cannot use CONFIG_STACK_VALIDATION=y, please install libelf-dev, libelf-devel or elfutils-libelf-devel" >&2
|
||||
endif
|
||||
endif
|
||||
|
||||
# Check for CONFIG flags that require compiler support. Abort the build
|
||||
# after .config has been processed, but before the kernel build starts.
|
||||
|
|
|
@ -965,4 +965,12 @@ config REFCOUNT_FULL
|
|||
against various use-after-free conditions that can be used in
|
||||
security flaw exploits.
|
||||
|
||||
config HAVE_ARCH_COMPILER_H
|
||||
bool
|
||||
help
|
||||
An architecture can select this if it provides an
|
||||
asm/compiler.h header that should be included after
|
||||
linux/compiler-*.h in order to override macro definitions that those
|
||||
headers generally provide.
|
||||
|
||||
source "kernel/gcov/Kconfig"
|
||||
|
|
|
@ -56,15 +56,15 @@
|
|||
|
||||
#elif defined(CONFIG_ALPHA_DP264) || \
|
||||
defined(CONFIG_ALPHA_LYNX) || \
|
||||
defined(CONFIG_ALPHA_SHARK) || \
|
||||
defined(CONFIG_ALPHA_EIGER)
|
||||
defined(CONFIG_ALPHA_SHARK)
|
||||
# define NR_IRQS 64
|
||||
|
||||
#elif defined(CONFIG_ALPHA_TITAN)
|
||||
#define NR_IRQS 80
|
||||
|
||||
#elif defined(CONFIG_ALPHA_RAWHIDE) || \
|
||||
defined(CONFIG_ALPHA_TAKARA)
|
||||
defined(CONFIG_ALPHA_TAKARA) || \
|
||||
defined(CONFIG_ALPHA_EIGER)
|
||||
# define NR_IRQS 128
|
||||
|
||||
#elif defined(CONFIG_ALPHA_WILDFIRE)
|
||||
|
|
|
@ -73,9 +73,15 @@
|
|||
})
|
||||
|
||||
#define user_termios_to_kernel_termios(k, u) \
|
||||
copy_from_user(k, u, sizeof(struct termios))
|
||||
copy_from_user(k, u, sizeof(struct termios2))
|
||||
|
||||
#define kernel_termios_to_user_termios(u, k) \
|
||||
copy_to_user(u, k, sizeof(struct termios2))
|
||||
|
||||
#define user_termios_to_kernel_termios_1(k, u) \
|
||||
copy_from_user(k, u, sizeof(struct termios))
|
||||
|
||||
#define kernel_termios_to_user_termios_1(u, k) \
|
||||
copy_to_user(u, k, sizeof(struct termios))
|
||||
|
||||
#endif /* _ALPHA_TERMIOS_H */
|
||||
|
|
|
@ -32,6 +32,11 @@
|
|||
#define TCXONC _IO('t', 30)
|
||||
#define TCFLSH _IO('t', 31)
|
||||
|
||||
#define TCGETS2 _IOR('T', 42, struct termios2)
|
||||
#define TCSETS2 _IOW('T', 43, struct termios2)
|
||||
#define TCSETSW2 _IOW('T', 44, struct termios2)
|
||||
#define TCSETSF2 _IOW('T', 45, struct termios2)
|
||||
|
||||
#define TIOCSWINSZ _IOW('t', 103, struct winsize)
|
||||
#define TIOCGWINSZ _IOR('t', 104, struct winsize)
|
||||
#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
|
||||
|
|
|
@ -26,6 +26,19 @@ struct termios {
|
|||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
/* Alpha has identical termios and termios2 */
|
||||
|
||||
struct termios2 {
|
||||
tcflag_t c_iflag; /* input mode flags */
|
||||
tcflag_t c_oflag; /* output mode flags */
|
||||
tcflag_t c_cflag; /* control mode flags */
|
||||
tcflag_t c_lflag; /* local mode flags */
|
||||
cc_t c_cc[NCCS]; /* control characters */
|
||||
cc_t c_line; /* line discipline (== c_cc[19]) */
|
||||
speed_t c_ispeed; /* input speed */
|
||||
speed_t c_ospeed; /* output speed */
|
||||
};
|
||||
|
||||
/* Alpha has matching termios and ktermios */
|
||||
|
||||
struct ktermios {
|
||||
|
@ -148,6 +161,7 @@ struct ktermios {
|
|||
#define B3000000 00034
|
||||
#define B3500000 00035
|
||||
#define B4000000 00036
|
||||
#define BOTHER 00037
|
||||
|
||||
#define CSIZE 00001400
|
||||
#define CS5 00000000
|
||||
|
@ -165,6 +179,9 @@ struct ktermios {
|
|||
#define CMSPAR 010000000000 /* mark or space (stick) parity */
|
||||
#define CRTSCTS 020000000000 /* flow control */
|
||||
|
||||
#define CIBAUD 07600000
|
||||
#define IBSHIFT 16
|
||||
|
||||
/* c_lflag bits */
|
||||
#define ISIG 0x00000080
|
||||
#define ICANON 0x00000100
|
||||
|
|
|
@ -78,7 +78,7 @@ __load_new_mm_context(struct mm_struct *next_mm)
|
|||
/* Macro for exception fixup code to access integer registers. */
|
||||
#define dpf_reg(r) \
|
||||
(((unsigned long *)regs)[(r) <= 8 ? (r) : (r) <= 15 ? (r)-16 : \
|
||||
(r) <= 18 ? (r)+8 : (r)-10])
|
||||
(r) <= 18 ? (r)+10 : (r)-10])
|
||||
|
||||
asmlinkage void
|
||||
do_page_fault(unsigned long address, unsigned long mmcsr,
|
||||
|
|
|
@ -109,7 +109,7 @@ endmenu
|
|||
|
||||
choice
|
||||
prompt "ARC Instruction Set"
|
||||
default ISA_ARCOMPACT
|
||||
default ISA_ARCV2
|
||||
|
||||
config ISA_ARCOMPACT
|
||||
bool "ARCompact ISA"
|
||||
|
@ -417,6 +417,14 @@ config ARC_HAS_ACCL_REGS
|
|||
(also referred to as r58:r59). These can also be used by gcc as GPR so
|
||||
kernel needs to save/restore per process
|
||||
|
||||
config ARC_IRQ_NO_AUTOSAVE
|
||||
bool "Disable hardware autosave regfile on interrupts"
|
||||
default n
|
||||
help
|
||||
On HS cores, taken interrupt auto saves the regfile on stack.
|
||||
This is programmable and can be optionally disabled in which case
|
||||
software INTERRUPT_PROLOGUE/EPILGUE do the needed work
|
||||
|
||||
endif # ISA_ARCV2
|
||||
|
||||
endmenu # "ARC CPU Configuration"
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
# published by the Free Software Foundation.
|
||||
#
|
||||
|
||||
KBUILD_DEFCONFIG := nsim_700_defconfig
|
||||
KBUILD_DEFCONFIG := nsim_hs_defconfig
|
||||
|
||||
cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
|
||||
cflags-$(CONFIG_ISA_ARCOMPACT) += -mA7
|
||||
|
|
|
@ -15,6 +15,7 @@ CONFIG_PERF_EVENTS=y
|
|||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
|
@ -98,6 +99,7 @@ CONFIG_VFAT_FS=y
|
|||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
|
@ -97,6 +97,7 @@ CONFIG_VFAT_FS=y
|
|||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
|
@ -100,6 +100,7 @@ CONFIG_VFAT_FS=y
|
|||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
|
@ -66,6 +66,7 @@ CONFIG_EXT3_FS=y
|
|||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
|
@ -15,6 +15,7 @@ CONFIG_SYSCTL_SYSCALL=y
|
|||
CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
|
@ -74,6 +75,7 @@ CONFIG_PROC_KCORE=y
|
|||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
|
@ -16,6 +16,7 @@ CONFIG_EMBEDDED=y
|
|||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_LBDAF is not set
|
||||
|
|
|
@ -16,6 +16,7 @@ CONFIG_EMBEDDED=y
|
|||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_LBDAF is not set
|
||||
|
@ -69,5 +70,6 @@ CONFIG_EXT2_FS_XATTR=y
|
|||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
|
|
|
@ -68,5 +68,6 @@ CONFIG_EXT2_FS_XATTR=y
|
|||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
|
|
|
@ -79,6 +79,7 @@ CONFIG_EXT2_FS_XATTR=y
|
|||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
CONFIG_FTRACE=y
|
||||
|
|
|
@ -19,6 +19,7 @@ CONFIG_KALLSYMS_ALL=y
|
|||
# CONFIG_AIO is not set
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
|
|
|
@ -88,6 +88,7 @@ CONFIG_NTFS_FS=y
|
|||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
|
@ -92,6 +92,7 @@ CONFIG_NTFS_FS=y
|
|||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
|
@ -340,7 +340,7 @@ static inline __attribute__ ((const)) int __fls(unsigned long x)
|
|||
/*
|
||||
* __ffs: Similar to ffs, but zero based (0-31)
|
||||
*/
|
||||
static inline __attribute__ ((const)) int __ffs(unsigned long word)
|
||||
static inline __attribute__ ((const)) unsigned long __ffs(unsigned long word)
|
||||
{
|
||||
if (!word)
|
||||
return word;
|
||||
|
@ -400,9 +400,9 @@ static inline __attribute__ ((const)) int ffs(unsigned long x)
|
|||
/*
|
||||
* __ffs: Similar to ffs, but zero based (0-31)
|
||||
*/
|
||||
static inline __attribute__ ((const)) int __ffs(unsigned long x)
|
||||
static inline __attribute__ ((const)) unsigned long __ffs(unsigned long x)
|
||||
{
|
||||
int n;
|
||||
unsigned long n;
|
||||
|
||||
asm volatile(
|
||||
" ffs.f %0, %1 \n" /* 0:31; 31(Z) if src 0 */
|
||||
|
|
|
@ -52,6 +52,17 @@
|
|||
#define cache_line_size() SMP_CACHE_BYTES
|
||||
#define ARCH_DMA_MINALIGN SMP_CACHE_BYTES
|
||||
|
||||
/*
|
||||
* Make sure slab-allocated buffers are 64-bit aligned when atomic64_t uses
|
||||
* ARCv2 64-bit atomics (LLOCKD/SCONDD). This guarantess runtime 64-bit
|
||||
* alignment for any atomic64_t embedded in buffer.
|
||||
* Default ARCH_SLAB_MINALIGN is __alignof__(long long) which has a relaxed
|
||||
* value of 4 (and not 8) in ARC ABI.
|
||||
*/
|
||||
#if defined(CONFIG_ARC_HAS_LL64) && defined(CONFIG_ARC_HAS_LLSC)
|
||||
#define ARCH_SLAB_MINALIGN 8
|
||||
#endif
|
||||
|
||||
extern void arc_cache_init(void);
|
||||
extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
|
||||
extern void read_decode_cache_bcr(void);
|
||||
|
|
|
@ -17,6 +17,33 @@
|
|||
;
|
||||
; Now manually save: r12, sp, fp, gp, r25
|
||||
|
||||
#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
|
||||
.ifnc \called_from, exception
|
||||
st.as r9, [sp, -10] ; save r9 in it's final stack slot
|
||||
sub sp, sp, 12 ; skip JLI, LDI, EI
|
||||
|
||||
PUSH lp_count
|
||||
PUSHAX lp_start
|
||||
PUSHAX lp_end
|
||||
PUSH blink
|
||||
|
||||
PUSH r11
|
||||
PUSH r10
|
||||
|
||||
sub sp, sp, 4 ; skip r9
|
||||
|
||||
PUSH r8
|
||||
PUSH r7
|
||||
PUSH r6
|
||||
PUSH r5
|
||||
PUSH r4
|
||||
PUSH r3
|
||||
PUSH r2
|
||||
PUSH r1
|
||||
PUSH r0
|
||||
.endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_ACCL_REGS
|
||||
PUSH r59
|
||||
PUSH r58
|
||||
|
@ -86,6 +113,33 @@
|
|||
POP r59
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
|
||||
.ifnc \called_from, exception
|
||||
POP r0
|
||||
POP r1
|
||||
POP r2
|
||||
POP r3
|
||||
POP r4
|
||||
POP r5
|
||||
POP r6
|
||||
POP r7
|
||||
POP r8
|
||||
POP r9
|
||||
POP r10
|
||||
POP r11
|
||||
|
||||
POP blink
|
||||
POPAX lp_end
|
||||
POPAX lp_start
|
||||
|
||||
POP r9
|
||||
mov lp_count, r9
|
||||
|
||||
add sp, sp, 12 ; skip JLI, LDI, EI
|
||||
ld.as r9, [sp, -10] ; reload r9 which got clobbered
|
||||
.endif
|
||||
#endif
|
||||
|
||||
.endm
|
||||
|
||||
/*------------------------------------------------------------------------*/
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#include <linux/types.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
#include <asm/barrier.h>
|
||||
|
@ -94,6 +95,42 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
|
|||
return w;
|
||||
}
|
||||
|
||||
/*
|
||||
* {read,write}s{b,w,l}() repeatedly access the same IO address in
|
||||
* native endianness in 8-, 16-, 32-bit chunks {into,from} memory,
|
||||
* @count times
|
||||
*/
|
||||
#define __raw_readsx(t,f) \
|
||||
static inline void __raw_reads##f(const volatile void __iomem *addr, \
|
||||
void *ptr, unsigned int count) \
|
||||
{ \
|
||||
bool is_aligned = ((unsigned long)ptr % ((t) / 8)) == 0; \
|
||||
u##t *buf = ptr; \
|
||||
\
|
||||
if (!count) \
|
||||
return; \
|
||||
\
|
||||
/* Some ARC CPU's don't support unaligned accesses */ \
|
||||
if (is_aligned) { \
|
||||
do { \
|
||||
u##t x = __raw_read##f(addr); \
|
||||
*buf++ = x; \
|
||||
} while (--count); \
|
||||
} else { \
|
||||
do { \
|
||||
u##t x = __raw_read##f(addr); \
|
||||
put_unaligned(x, buf++); \
|
||||
} while (--count); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define __raw_readsb __raw_readsb
|
||||
__raw_readsx(8, b)
|
||||
#define __raw_readsw __raw_readsw
|
||||
__raw_readsx(16, w)
|
||||
#define __raw_readsl __raw_readsl
|
||||
__raw_readsx(32, l)
|
||||
|
||||
#define __raw_writeb __raw_writeb
|
||||
static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
|
||||
{
|
||||
|
@ -126,6 +163,35 @@ static inline void __raw_writel(u32 w, volatile void __iomem *addr)
|
|||
|
||||
}
|
||||
|
||||
#define __raw_writesx(t,f) \
|
||||
static inline void __raw_writes##f(volatile void __iomem *addr, \
|
||||
const void *ptr, unsigned int count) \
|
||||
{ \
|
||||
bool is_aligned = ((unsigned long)ptr % ((t) / 8)) == 0; \
|
||||
const u##t *buf = ptr; \
|
||||
\
|
||||
if (!count) \
|
||||
return; \
|
||||
\
|
||||
/* Some ARC CPU's don't support unaligned accesses */ \
|
||||
if (is_aligned) { \
|
||||
do { \
|
||||
__raw_write##f(*buf++, addr); \
|
||||
} while (--count); \
|
||||
} else { \
|
||||
do { \
|
||||
__raw_write##f(get_unaligned(buf++), addr); \
|
||||
} while (--count); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define __raw_writesb __raw_writesb
|
||||
__raw_writesx(8, b)
|
||||
#define __raw_writesw __raw_writesw
|
||||
__raw_writesx(16, w)
|
||||
#define __raw_writesl __raw_writesl
|
||||
__raw_writesx(32, l)
|
||||
|
||||
/*
|
||||
* MMIO can also get buffered/optimized in micro-arch, so barriers needed
|
||||
* Based on ARM model for the typical use case
|
||||
|
@ -141,10 +207,16 @@ static inline void __raw_writel(u32 w, volatile void __iomem *addr)
|
|||
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
|
||||
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
|
||||
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
|
||||
#define readsb(p,d,l) ({ __raw_readsb(p,d,l); __iormb(); })
|
||||
#define readsw(p,d,l) ({ __raw_readsw(p,d,l); __iormb(); })
|
||||
#define readsl(p,d,l) ({ __raw_readsl(p,d,l); __iormb(); })
|
||||
|
||||
#define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
|
||||
#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
|
||||
#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
|
||||
#define writesb(p,d,l) ({ __iowmb(); __raw_writesb(p,d,l); })
|
||||
#define writesw(p,d,l) ({ __iowmb(); __raw_writesw(p,d,l); })
|
||||
#define writesl(p,d,l) ({ __iowmb(); __raw_writesl(p,d,l); })
|
||||
|
||||
/*
|
||||
* Relaxed API for drivers which can handle barrier ordering themselves
|
||||
|
|
|
@ -103,7 +103,8 @@ static const char * const arc_pmu_ev_hw_map[] = {
|
|||
|
||||
/* counts condition */
|
||||
[PERF_COUNT_HW_INSTRUCTIONS] = "iall",
|
||||
[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmp", /* Excludes ZOL jumps */
|
||||
/* All jump instructions that are taken */
|
||||
[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmptak",
|
||||
[PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
[PERF_COUNT_HW_BRANCH_MISSES] = "bpmp",
|
||||
|
|
|
@ -207,7 +207,7 @@ raw_copy_from_user(void *to, const void __user *from, unsigned long n)
|
|||
*/
|
||||
"=&r" (tmp), "+r" (to), "+r" (from)
|
||||
:
|
||||
: "lp_count", "lp_start", "lp_end", "memory");
|
||||
: "lp_count", "memory");
|
||||
|
||||
return n;
|
||||
}
|
||||
|
@ -433,7 +433,7 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n)
|
|||
*/
|
||||
"=&r" (tmp), "+r" (to), "+r" (from)
|
||||
:
|
||||
: "lp_count", "lp_start", "lp_end", "memory");
|
||||
: "lp_count", "memory");
|
||||
|
||||
return n;
|
||||
}
|
||||
|
@ -653,7 +653,7 @@ static inline unsigned long __arc_clear_user(void __user *to, unsigned long n)
|
|||
" .previous \n"
|
||||
: "+r"(d_char), "+r"(res)
|
||||
: "i"(0)
|
||||
: "lp_count", "lp_start", "lp_end", "memory");
|
||||
: "lp_count", "memory");
|
||||
|
||||
return res;
|
||||
}
|
||||
|
@ -686,7 +686,7 @@ __arc_strncpy_from_user(char *dst, const char __user *src, long count)
|
|||
" .previous \n"
|
||||
: "+r"(res), "+r"(dst), "+r"(src), "=r"(val)
|
||||
: "g"(-EFAULT), "r"(count)
|
||||
: "lp_count", "lp_start", "lp_end", "memory");
|
||||
: "lp_count", "memory");
|
||||
|
||||
return res;
|
||||
}
|
||||
|
|
|
@ -209,7 +209,9 @@ restore_regs:
|
|||
;####### Return from Intr #######
|
||||
|
||||
debug_marker_l1:
|
||||
bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot
|
||||
; bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot
|
||||
btst r0, STATUS_DE_BIT ; Z flag set if bit clear
|
||||
bnz .Lintr_ret_to_delay_slot ; branch if STATUS_DE_BIT set
|
||||
|
||||
.Lisr_ret_fast_path:
|
||||
; Handle special case #1: (Entry via Exception, Return via IRQ)
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
#include <asm/entry.h>
|
||||
#include <asm/arcregs.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/irqflags.h>
|
||||
|
||||
.macro CPU_EARLY_SETUP
|
||||
|
||||
|
@ -47,6 +48,15 @@
|
|||
sr r5, [ARC_REG_DC_CTRL]
|
||||
|
||||
1:
|
||||
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
; Unaligned access is disabled at reset, so re-enable early as
|
||||
; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
|
||||
; by default
|
||||
lr r5, [status32]
|
||||
bset r5, r5, STATUS_AD_BIT
|
||||
kflag r5
|
||||
#endif
|
||||
.endm
|
||||
|
||||
.section .init.text, "ax",@progbits
|
||||
|
@ -93,9 +103,9 @@ ENTRY(stext)
|
|||
#ifdef CONFIG_ARC_UBOOT_SUPPORT
|
||||
; Uboot - kernel ABI
|
||||
; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2
|
||||
; r1 = magic number (board identity, unused as of now
|
||||
; r1 = magic number (always zero as of now)
|
||||
; r2 = pointer to uboot provided cmdline or external DTB in mem
|
||||
; These are handled later in setup_arch()
|
||||
; These are handled later in handle_uboot_args()
|
||||
st r0, [@uboot_tag]
|
||||
st r2, [@uboot_arg]
|
||||
#endif
|
||||
|
|
|
@ -49,11 +49,13 @@ void arc_init_IRQ(void)
|
|||
|
||||
*(unsigned int *)&ictrl = 0;
|
||||
|
||||
#ifndef CONFIG_ARC_IRQ_NO_AUTOSAVE
|
||||
ictrl.save_nr_gpr_pairs = 6; /* r0 to r11 (r12 saved manually) */
|
||||
ictrl.save_blink = 1;
|
||||
ictrl.save_lp_regs = 1; /* LP_COUNT, LP_START, LP_END */
|
||||
ictrl.save_u_to_u = 0; /* user ctxt saved on kernel stack */
|
||||
ictrl.save_idx_regs = 1; /* JLI, LDI, EI */
|
||||
#endif
|
||||
|
||||
WRITE_AUX(AUX_IRQ_CTRL, ictrl);
|
||||
|
||||
|
|
|
@ -414,43 +414,80 @@ void setup_processor(void)
|
|||
arc_chk_core_config();
|
||||
}
|
||||
|
||||
static inline int is_kernel(unsigned long addr)
|
||||
static inline bool uboot_arg_invalid(unsigned long addr)
|
||||
{
|
||||
if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
|
||||
return 1;
|
||||
return 0;
|
||||
/*
|
||||
* Check that it is a untranslated address (although MMU is not enabled
|
||||
* yet, it being a high address ensures this is not by fluke)
|
||||
*/
|
||||
if (addr < PAGE_OFFSET)
|
||||
return true;
|
||||
|
||||
/* Check that address doesn't clobber resident kernel image */
|
||||
return addr >= (unsigned long)_stext && addr <= (unsigned long)_end;
|
||||
}
|
||||
|
||||
#define IGNORE_ARGS "Ignore U-boot args: "
|
||||
|
||||
/* uboot_tag values for U-boot - kernel ABI revision 0; see head.S */
|
||||
#define UBOOT_TAG_NONE 0
|
||||
#define UBOOT_TAG_CMDLINE 1
|
||||
#define UBOOT_TAG_DTB 2
|
||||
|
||||
void __init handle_uboot_args(void)
|
||||
{
|
||||
bool use_embedded_dtb = true;
|
||||
bool append_cmdline = false;
|
||||
|
||||
#ifdef CONFIG_ARC_UBOOT_SUPPORT
|
||||
/* check that we know this tag */
|
||||
if (uboot_tag != UBOOT_TAG_NONE &&
|
||||
uboot_tag != UBOOT_TAG_CMDLINE &&
|
||||
uboot_tag != UBOOT_TAG_DTB) {
|
||||
pr_warn(IGNORE_ARGS "invalid uboot tag: '%08x'\n", uboot_tag);
|
||||
goto ignore_uboot_args;
|
||||
}
|
||||
|
||||
if (uboot_tag != UBOOT_TAG_NONE &&
|
||||
uboot_arg_invalid((unsigned long)uboot_arg)) {
|
||||
pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
|
||||
goto ignore_uboot_args;
|
||||
}
|
||||
|
||||
/* see if U-boot passed an external Device Tree blob */
|
||||
if (uboot_tag == UBOOT_TAG_DTB) {
|
||||
machine_desc = setup_machine_fdt((void *)uboot_arg);
|
||||
|
||||
/* external Device Tree blob is invalid - use embedded one */
|
||||
use_embedded_dtb = !machine_desc;
|
||||
}
|
||||
|
||||
if (uboot_tag == UBOOT_TAG_CMDLINE)
|
||||
append_cmdline = true;
|
||||
|
||||
ignore_uboot_args:
|
||||
#endif
|
||||
|
||||
if (use_embedded_dtb) {
|
||||
machine_desc = setup_machine_fdt(__dtb_start);
|
||||
if (!machine_desc)
|
||||
panic("Embedded DT invalid\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* NOTE: @boot_command_line is populated by setup_machine_fdt() so this
|
||||
* append processing can only happen after.
|
||||
*/
|
||||
if (append_cmdline) {
|
||||
/* Ensure a whitespace between the 2 cmdlines */
|
||||
strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
|
||||
strlcat(boot_command_line, uboot_arg, COMMAND_LINE_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
void __init setup_arch(char **cmdline_p)
|
||||
{
|
||||
#ifdef CONFIG_ARC_UBOOT_SUPPORT
|
||||
/* make sure that uboot passed pointer to cmdline/dtb is valid */
|
||||
if (uboot_tag && is_kernel((unsigned long)uboot_arg))
|
||||
panic("Invalid uboot arg\n");
|
||||
|
||||
/* See if u-boot passed an external Device Tree blob */
|
||||
machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
|
||||
if (!machine_desc)
|
||||
#endif
|
||||
{
|
||||
/* No, so try the embedded one */
|
||||
machine_desc = setup_machine_fdt(__dtb_start);
|
||||
if (!machine_desc)
|
||||
panic("Embedded DT invalid\n");
|
||||
|
||||
/*
|
||||
* If we are here, it is established that @uboot_arg didn't
|
||||
* point to DT blob. Instead if u-boot says it is cmdline,
|
||||
* append to embedded DT cmdline.
|
||||
* setup_machine_fdt() would have populated @boot_command_line
|
||||
*/
|
||||
if (uboot_tag == 1) {
|
||||
/* Ensure a whitespace between the 2 cmdlines */
|
||||
strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
|
||||
strlcat(boot_command_line, uboot_arg,
|
||||
COMMAND_LINE_SIZE);
|
||||
}
|
||||
}
|
||||
handle_uboot_args();
|
||||
|
||||
/* Save unparsed command line copy for /proc/cmdline */
|
||||
*cmdline_p = boot_command_line;
|
||||
|
|
|
@ -25,15 +25,11 @@
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_LL64
|
||||
# define PREFETCH_READ(RX) prefetch [RX, 56]
|
||||
# define PREFETCH_WRITE(RX) prefetchw [RX, 64]
|
||||
# define LOADX(DST,RX) ldd.ab DST, [RX, 8]
|
||||
# define STOREX(SRC,RX) std.ab SRC, [RX, 8]
|
||||
# define ZOLSHFT 5
|
||||
# define ZOLAND 0x1F
|
||||
#else
|
||||
# define PREFETCH_READ(RX) prefetch [RX, 28]
|
||||
# define PREFETCH_WRITE(RX) prefetchw [RX, 32]
|
||||
# define LOADX(DST,RX) ld.ab DST, [RX, 4]
|
||||
# define STOREX(SRC,RX) st.ab SRC, [RX, 4]
|
||||
# define ZOLSHFT 4
|
||||
|
@ -41,8 +37,6 @@
|
|||
#endif
|
||||
|
||||
ENTRY_CFI(memcpy)
|
||||
prefetch [r1] ; Prefetch the read location
|
||||
prefetchw [r0] ; Prefetch the write location
|
||||
mov.f 0, r2
|
||||
;;; if size is zero
|
||||
jz.d [blink]
|
||||
|
@ -72,8 +66,6 @@ ENTRY_CFI(memcpy)
|
|||
lpnz @.Lcopy32_64bytes
|
||||
;; LOOP START
|
||||
LOADX (r6, r1)
|
||||
PREFETCH_READ (r1)
|
||||
PREFETCH_WRITE (r3)
|
||||
LOADX (r8, r1)
|
||||
LOADX (r10, r1)
|
||||
LOADX (r4, r1)
|
||||
|
@ -117,9 +109,7 @@ ENTRY_CFI(memcpy)
|
|||
lpnz @.Lcopy8bytes_1
|
||||
;; LOOP START
|
||||
ld.ab r6, [r1, 4]
|
||||
prefetch [r1, 28] ;Prefetch the next read location
|
||||
ld.ab r8, [r1,4]
|
||||
prefetchw [r3, 32] ;Prefetch the next write location
|
||||
|
||||
SHIFT_1 (r7, r6, 24)
|
||||
or r7, r7, r5
|
||||
|
@ -162,9 +152,7 @@ ENTRY_CFI(memcpy)
|
|||
lpnz @.Lcopy8bytes_2
|
||||
;; LOOP START
|
||||
ld.ab r6, [r1, 4]
|
||||
prefetch [r1, 28] ;Prefetch the next read location
|
||||
ld.ab r8, [r1,4]
|
||||
prefetchw [r3, 32] ;Prefetch the next write location
|
||||
|
||||
SHIFT_1 (r7, r6, 16)
|
||||
or r7, r7, r5
|
||||
|
@ -204,9 +192,7 @@ ENTRY_CFI(memcpy)
|
|||
lpnz @.Lcopy8bytes_3
|
||||
;; LOOP START
|
||||
ld.ab r6, [r1, 4]
|
||||
prefetch [r1, 28] ;Prefetch the next read location
|
||||
ld.ab r8, [r1,4]
|
||||
prefetchw [r3, 32] ;Prefetch the next write location
|
||||
|
||||
SHIFT_1 (r7, r6, 8)
|
||||
or r7, r7, r5
|
||||
|
|
|
@ -7,11 +7,39 @@
|
|||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/cache.h>
|
||||
|
||||
#undef PREALLOC_NOT_AVAIL
|
||||
/*
|
||||
* The memset implementation below is optimized to use prefetchw and prealloc
|
||||
* instruction in case of CPU with 64B L1 data cache line (L1_CACHE_SHIFT == 6)
|
||||
* If you want to implement optimized memset for other possible L1 data cache
|
||||
* line lengths (32B and 128B) you should rewrite code carefully checking
|
||||
* we don't call any prefetchw/prealloc instruction for L1 cache lines which
|
||||
* don't belongs to memset area.
|
||||
*/
|
||||
|
||||
#if L1_CACHE_SHIFT == 6
|
||||
|
||||
.macro PREALLOC_INSTR reg, off
|
||||
prealloc [\reg, \off]
|
||||
.endm
|
||||
|
||||
.macro PREFETCHW_INSTR reg, off
|
||||
prefetchw [\reg, \off]
|
||||
.endm
|
||||
|
||||
#else
|
||||
|
||||
.macro PREALLOC_INSTR
|
||||
.endm
|
||||
|
||||
.macro PREFETCHW_INSTR
|
||||
.endm
|
||||
|
||||
#endif
|
||||
|
||||
ENTRY_CFI(memset)
|
||||
prefetchw [r0] ; Prefetch the write location
|
||||
PREFETCHW_INSTR r0, 0 ; Prefetch the first write location
|
||||
mov.f 0, r2
|
||||
;;; if size is zero
|
||||
jz.d [blink]
|
||||
|
@ -48,11 +76,8 @@ ENTRY_CFI(memset)
|
|||
|
||||
lpnz @.Lset64bytes
|
||||
;; LOOP START
|
||||
#ifdef PREALLOC_NOT_AVAIL
|
||||
prefetchw [r3, 64] ;Prefetch the next write location
|
||||
#else
|
||||
prealloc [r3, 64]
|
||||
#endif
|
||||
PREALLOC_INSTR r3, 64 ; alloc next line w/o fetching
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_LL64
|
||||
std.ab r4, [r3, 8]
|
||||
std.ab r4, [r3, 8]
|
||||
|
@ -85,7 +110,6 @@ ENTRY_CFI(memset)
|
|||
lsr.f lp_count, r2, 5 ;Last remaining max 124 bytes
|
||||
lpnz .Lset32bytes
|
||||
;; LOOP START
|
||||
prefetchw [r3, 32] ;Prefetch the next write location
|
||||
#ifdef CONFIG_ARC_HAS_LL64
|
||||
std.ab r4, [r3, 8]
|
||||
std.ab r4, [r3, 8]
|
||||
|
|
|
@ -138,7 +138,8 @@ void __init setup_arch_memory(void)
|
|||
*/
|
||||
|
||||
memblock_add_node(low_mem_start, low_mem_sz, 0);
|
||||
memblock_reserve(low_mem_start, __pa(_end) - low_mem_start);
|
||||
memblock_reserve(CONFIG_LINUX_LINK_BASE,
|
||||
__pa(_end) - CONFIG_LINUX_LINK_BASE);
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
if (initrd_start)
|
||||
|
|
|
@ -9,5 +9,6 @@ menuconfig ARC_SOC_HSDK
|
|||
bool "ARC HS Development Kit SOC"
|
||||
depends on ISA_ARCV2
|
||||
select ARC_HAS_ACCL_REGS
|
||||
select ARC_IRQ_NO_AUTOSAVE
|
||||
select CLK_HSDK
|
||||
select RESET_HSDK
|
||||
|
|
|
@ -1457,6 +1457,7 @@ config NR_CPUS
|
|||
config HOTPLUG_CPU
|
||||
bool "Support for hot-pluggable CPUs"
|
||||
depends on SMP
|
||||
select GENERIC_IRQ_MIGRATION
|
||||
help
|
||||
Say Y here to experiment with turning CPUs off and on. CPUs
|
||||
can be controlled through /sys/devices/system/cpu.
|
||||
|
|
|
@ -106,7 +106,7 @@ tune-$(CONFIG_CPU_V6K) =$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
|
|||
tune-y := $(tune-y)
|
||||
|
||||
ifeq ($(CONFIG_AEABI),y)
|
||||
CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork -mfpu=vfp
|
||||
CFLAGS_ABI :=-mabi=aapcs-linux -mfpu=vfp
|
||||
else
|
||||
CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,)
|
||||
endif
|
||||
|
|
|
@ -113,7 +113,7 @@ CFLAGS_fdt_ro.o := $(nossp_flags)
|
|||
CFLAGS_fdt_rw.o := $(nossp_flags)
|
||||
CFLAGS_fdt_wip.o := $(nossp_flags)
|
||||
|
||||
ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
|
||||
ccflags-y := -fpic $(call cc-option,-mno-single-pic-base,) -fno-builtin -I$(obj)
|
||||
asflags-y := -DZIMAGE
|
||||
|
||||
# Supply kernel BSS size to the decompressor via a linker symbol.
|
||||
|
|
|
@ -106,21 +106,23 @@
|
|||
global_timer: timer@1e200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x1e200 0x20>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&axi_clk>;
|
||||
};
|
||||
|
||||
local_timer: local-timer@1e600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x1e600 0x20>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
|
||||
IRQ_TYPE_EDGE_RISING)>;
|
||||
clocks = <&axi_clk>;
|
||||
};
|
||||
|
||||
twd_watchdog: watchdog@1e620 {
|
||||
compatible = "arm,cortex-a9-twd-wdt";
|
||||
reg = <0x1e620 0x20>;
|
||||
interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
|
||||
IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
armpll: armpll {
|
||||
|
@ -158,7 +160,7 @@
|
|||
serial0: serial@600 {
|
||||
compatible = "brcm,bcm6345-uart";
|
||||
reg = <0x600 0x1b>;
|
||||
interrupts = <GIC_SPI 32 0>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&periph_clk>;
|
||||
clock-names = "periph";
|
||||
status = "disabled";
|
||||
|
@ -167,7 +169,7 @@
|
|||
serial1: serial@620 {
|
||||
compatible = "brcm,bcm6345-uart";
|
||||
reg = <0x620 0x1b>;
|
||||
interrupts = <GIC_SPI 33 0>;
|
||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&periph_clk>;
|
||||
clock-names = "periph";
|
||||
status = "disabled";
|
||||
|
@ -180,7 +182,7 @@
|
|||
reg = <0x2000 0x600>, <0xf0 0x10>;
|
||||
reg-names = "nand", "nand-int-base";
|
||||
status = "disabled";
|
||||
interrupts = <GIC_SPI 38 0>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "nand";
|
||||
};
|
||||
|
||||
|
|
|
@ -169,7 +169,7 @@
|
|||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "DA850/OMAP-L138 EVM";
|
||||
simple-audio-card,name = "DA850-OMAPL138 EVM";
|
||||
simple-audio-card,widgets =
|
||||
"Line", "Line In",
|
||||
"Line", "Line Out";
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "DA850/OMAP-L138 LCDK";
|
||||
simple-audio-card,name = "DA850-OMAPL138 LCDK";
|
||||
simple-audio-card,widgets =
|
||||
"Line", "Line In",
|
||||
"Line", "Line Out";
|
||||
|
|
|
@ -333,7 +333,7 @@
|
|||
ti,hwmods = "pcie1";
|
||||
phys = <&pcie1_phy>;
|
||||
phy-names = "pcie-phy0";
|
||||
ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
|
||||
ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -82,6 +82,22 @@
|
|||
compatible = "arm,cortex-a7";
|
||||
reg = <1>;
|
||||
clock-frequency = <1000000000>;
|
||||
clocks = <&cmu CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
#cooling-cells = <2>;
|
||||
|
||||
operating-points = <
|
||||
1000000 1150000
|
||||
900000 1112500
|
||||
800000 1075000
|
||||
700000 1037500
|
||||
600000 1000000
|
||||
500000 962500
|
||||
400000 925000
|
||||
300000 887500
|
||||
200000 850000
|
||||
100000 850000
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -156,6 +172,9 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-parent = <&gic>;
|
||||
clock-names = "clkout8";
|
||||
clocks = <&cmu CLK_FIN_PLL>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
mipi_phy: video-phy {
|
||||
|
|
|
@ -152,6 +152,8 @@
|
|||
reg = <0x66>;
|
||||
interrupt-parent = <&gpx0>;
|
||||
interrupts = <4 IRQ_TYPE_NONE>, <3 IRQ_TYPE_NONE>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max8997_irq>;
|
||||
|
||||
max8997,pmic-buck1-dvs-voltage = <1350000>;
|
||||
max8997,pmic-buck2-dvs-voltage = <1100000>;
|
||||
|
@ -289,6 +291,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
&pinctrl_1 {
|
||||
max8997_irq: max8997-irq {
|
||||
samsung,pins = "gpx0-3", "gpx0-4";
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci_0 {
|
||||
bus-width = <4>;
|
||||
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
|
||||
|
|
|
@ -52,8 +52,6 @@
|
|||
400000 975000
|
||||
200000 950000
|
||||
>;
|
||||
cooling-min-level = <4>;
|
||||
cooling-max-level = <2>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -61,6 +59,19 @@
|
|||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0x901>;
|
||||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
clock-latency = <160000>;
|
||||
|
||||
operating-points = <
|
||||
1200000 1250000
|
||||
1000000 1150000
|
||||
800000 1075000
|
||||
500000 975000
|
||||
400000 975000
|
||||
200000 950000
|
||||
>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -60,7 +60,7 @@
|
|||
};
|
||||
|
||||
emmc_pwrseq: pwrseq {
|
||||
pinctrl-0 = <&sd1_cd>;
|
||||
pinctrl-0 = <&emmc_rstn>;
|
||||
pinctrl-names = "default";
|
||||
compatible = "mmc-pwrseq-emmc";
|
||||
reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
|
||||
|
@ -161,12 +161,6 @@
|
|||
cpu0-supply = <&buck2_reg>;
|
||||
};
|
||||
|
||||
/* RSTN signal for eMMC */
|
||||
&sd1_cd {
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
};
|
||||
|
||||
&pinctrl_1 {
|
||||
gpio_power_key: power_key {
|
||||
samsung,pins = "gpx1-3";
|
||||
|
@ -184,6 +178,11 @@
|
|||
samsung,pins = "gpx3-7";
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
|
||||
};
|
||||
|
||||
emmc_rstn: emmc-rstn {
|
||||
samsung,pins = "gpk1-2";
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
&ehci {
|
||||
|
|
|
@ -45,8 +45,6 @@
|
|||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
cooling-min-level = <13>;
|
||||
cooling-max-level = <7>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
|
|
@ -57,38 +57,106 @@
|
|||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0>;
|
||||
clock-frequency = <1700000000>;
|
||||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
clock-latency = <140000>;
|
||||
|
||||
operating-points = <
|
||||
1700000 1300000
|
||||
1600000 1250000
|
||||
1500000 1225000
|
||||
1400000 1200000
|
||||
1300000 1150000
|
||||
1200000 1125000
|
||||
1100000 1100000
|
||||
1000000 1075000
|
||||
900000 1050000
|
||||
800000 1025000
|
||||
700000 1012500
|
||||
600000 1000000
|
||||
500000 975000
|
||||
400000 950000
|
||||
300000 937500
|
||||
200000 925000
|
||||
>;
|
||||
cooling-min-level = <15>;
|
||||
cooling-max-level = <9>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <1>;
|
||||
clock-frequency = <1700000000>;
|
||||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
|
||||
cpu0_opp_table: opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <925000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <937500>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <950000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-500000000 {
|
||||
opp-hz = /bits/ 64 <500000000>;
|
||||
opp-microvolt = <975000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-700000000 {
|
||||
opp-hz = /bits/ 64 <700000000>;
|
||||
opp-microvolt = <1012500>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1025000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-900000000 {
|
||||
opp-hz = /bits/ 64 <900000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <1075000>;
|
||||
clock-latency-ns = <140000>;
|
||||
opp-suspend;
|
||||
};
|
||||
opp-1100000000 {
|
||||
opp-hz = /bits/ 64 <1100000000>;
|
||||
opp-microvolt = <1100000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-1200000000 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <1125000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-1300000000 {
|
||||
opp-hz = /bits/ 64 <1300000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-1400000000 {
|
||||
opp-hz = /bits/ 64 <1400000000>;
|
||||
opp-microvolt = <1200000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-1500000000 {
|
||||
opp-hz = /bits/ 64 <1500000000>;
|
||||
opp-microvolt = <1225000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-1600000000 {
|
||||
opp-hz = /bits/ 64 <1600000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
opp-1700000000 {
|
||||
opp-hz = /bits/ 64 <1700000000>;
|
||||
opp-microvolt = <1300000>;
|
||||
clock-latency-ns = <140000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -33,8 +33,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -45,8 +43,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -57,8 +53,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -69,8 +63,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -82,8 +74,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <7>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -94,8 +84,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <7>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -106,8 +94,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <7>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -118,8 +104,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <7>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
aliases {
|
||||
/* Assign 20 so we don't get confused w/ builtin ones */
|
||||
i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel";
|
||||
i2c20 = &i2c_tunnel;
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
|
@ -952,7 +952,7 @@
|
|||
samsung,spi-feedback-delay = <1>;
|
||||
};
|
||||
|
||||
i2c-tunnel {
|
||||
i2c_tunnel: i2c-tunnel {
|
||||
compatible = "google,cros-ec-i2c-tunnel";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
@ -32,8 +32,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -44,8 +42,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -56,8 +52,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -68,8 +62,6 @@
|
|||
clock-frequency = <1000000000>;
|
||||
cci-control-port = <&cci_control0>;
|
||||
operating-points-v2 = <&cluster_a7_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <11>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -81,8 +73,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <15>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -93,8 +83,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <15>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -105,8 +93,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <15>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
|
@ -117,8 +103,6 @@
|
|||
clock-frequency = <1800000000>;
|
||||
cci-control-port = <&cci_control1>;
|
||||
operating-points-v2 = <&cluster_a15_opp_table>;
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <15>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
|
||||
aliases {
|
||||
/* Assign 20 so we don't get confused w/ builtin ones */
|
||||
i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel";
|
||||
i2c20 = &i2c_tunnel;
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
|
@ -921,7 +921,7 @@
|
|||
samsung,spi-feedback-delay = <1>;
|
||||
};
|
||||
|
||||
i2c-tunnel {
|
||||
i2c_tunnel: i2c-tunnel {
|
||||
compatible = "google,cros-ec-i2c-tunnel";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
@ -128,20 +128,16 @@
|
|||
read-only;
|
||||
};
|
||||
/*
|
||||
* Between the boot loader and the rootfs is the kernel
|
||||
* in a custom Storlink format flashed from the boot
|
||||
* menu. The rootfs is in squashfs format.
|
||||
* This firmware image contains the kernel catenated
|
||||
* with the squashfs root filesystem. For some reason
|
||||
* this is called "upgrade" on the vendor system.
|
||||
*/
|
||||
partition@1800c0 {
|
||||
label = "rootfs";
|
||||
reg = <0x001800c0 0x01dbff40>;
|
||||
read-only;
|
||||
};
|
||||
partition@1f40000 {
|
||||
partition@40000 {
|
||||
label = "upgrade";
|
||||
reg = <0x01f40000 0x00040000>;
|
||||
reg = <0x00040000 0x01f40000>;
|
||||
read-only;
|
||||
};
|
||||
/* RGDB, Residental Gateway Database? */
|
||||
partition@1f80000 {
|
||||
label = "rgdb";
|
||||
reg = <0x01f80000 0x00040000>;
|
||||
|
|
|
@ -130,6 +130,17 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
/* CPU rated to 1GHz, not 1.2GHz as per the default settings */
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
166666 850000
|
||||
400000 900000
|
||||
800000 1050000
|
||||
1000000 1200000
|
||||
>;
|
||||
};
|
||||
|
||||
&esdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_esdhc1>;
|
||||
|
|
|
@ -117,13 +117,17 @@
|
|||
compatible = "regulator-fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
|
||||
clock-names = "slow";
|
||||
regulator-name = "reg_wlan";
|
||||
startup-delay-us = <70000>;
|
||||
gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
usdhc2_pwrseq: usdhc2_pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
|
||||
clock-names = "ext_clock";
|
||||
};
|
||||
};
|
||||
|
||||
&adc1 {
|
||||
|
@ -430,6 +434,7 @@
|
|||
bus-width = <4>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_wlan>;
|
||||
mmc-pwrseq = <&usdhc2_pwrseq>;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
status = "okay";
|
||||
|
|
|
@ -36,8 +36,8 @@
|
|||
compatible = "gpio-fan";
|
||||
pinctrl-0 = <&pmx_fan_high_speed &pmx_fan_low_speed>;
|
||||
pinctrl-names = "default";
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_LOW
|
||||
&gpio1 13 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH
|
||||
&gpio1 13 GPIO_ACTIVE_HIGH>;
|
||||
gpio-fan,speed-map = <0 0
|
||||
3000 1
|
||||
6000 2>;
|
||||
|
|
|
@ -123,7 +123,7 @@
|
|||
};
|
||||
|
||||
&mmc3 {
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
|
||||
pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
|
|
|
@ -220,12 +220,15 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
twsi2: i2c@d4025000 {
|
||||
twsi2: i2c@d4031000 {
|
||||
compatible = "mrvl,mmp-twsi";
|
||||
reg = <0xd4025000 0x1000>;
|
||||
interrupts = <58>;
|
||||
reg = <0xd4031000 0x1000>;
|
||||
interrupt-parent = <&intcmux17>;
|
||||
interrupts = <0>;
|
||||
clocks = <&soc_clocks MMP2_CLK_TWSI1>;
|
||||
resets = <&soc_clocks MMP2_CLK_TWSI1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -92,7 +92,7 @@
|
|||
interrupts-extended = <
|
||||
&cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0
|
||||
&cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0
|
||||
&cpcap 48 1
|
||||
&cpcap 48 0
|
||||
>;
|
||||
interrupt-names =
|
||||
"id_ground", "id_float", "se0conn", "vbusvld",
|
||||
|
|
|
@ -33,6 +33,7 @@
|
|||
gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; /* gpio line 48 */
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
startup-delay-us = <25000>;
|
||||
};
|
||||
|
||||
vbat: fixedregulator-vbat {
|
||||
|
|
|
@ -153,7 +153,7 @@
|
|||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <115000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
|
|
|
@ -91,7 +91,7 @@
|
|||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <115000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
|
|
|
@ -88,7 +88,7 @@
|
|||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <115000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
|
|
|
@ -47,7 +47,11 @@
|
|||
#include "rk3288.dtsi"
|
||||
|
||||
/ {
|
||||
memory@0 {
|
||||
/*
|
||||
* The default coreboot on veyron devices ignores memory@0 nodes
|
||||
* and would instead create another memory node.
|
||||
*/
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
|
|
@ -308,7 +308,7 @@
|
|||
0x1 0x0 0x60000000 0x10000000
|
||||
0x2 0x0 0x70000000 0x10000000
|
||||
0x3 0x0 0x80000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
clocks = <&h32ck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
|
|
|
@ -601,7 +601,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
sdr: sdr@ffc25000 {
|
||||
sdr: sdr@ffcfb100 {
|
||||
compatible = "altr,sdr-ctl", "syscon";
|
||||
reg = <0xffcfb100 0x80>;
|
||||
};
|
||||
|
|
|
@ -383,6 +383,7 @@ CONFIG_ZISOFS=y
|
|||
CONFIG_UDF_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
|
|
|
@ -124,10 +124,10 @@ ENTRY(crc_t10dif_pmull)
|
|||
vext.8 q10, qzr, q0, #4
|
||||
|
||||
// receive the initial 64B data, xor the initial crc value
|
||||
vld1.64 {q0-q1}, [arg2, :128]!
|
||||
vld1.64 {q2-q3}, [arg2, :128]!
|
||||
vld1.64 {q4-q5}, [arg2, :128]!
|
||||
vld1.64 {q6-q7}, [arg2, :128]!
|
||||
vld1.64 {q0-q1}, [arg2]!
|
||||
vld1.64 {q2-q3}, [arg2]!
|
||||
vld1.64 {q4-q5}, [arg2]!
|
||||
vld1.64 {q6-q7}, [arg2]!
|
||||
CPU_LE( vrev64.8 q0, q0 )
|
||||
CPU_LE( vrev64.8 q1, q1 )
|
||||
CPU_LE( vrev64.8 q2, q2 )
|
||||
|
@ -167,7 +167,7 @@ CPU_LE( vrev64.8 q7, q7 )
|
|||
_fold_64_B_loop:
|
||||
|
||||
.macro fold64, reg1, reg2
|
||||
vld1.64 {q11-q12}, [arg2, :128]!
|
||||
vld1.64 {q11-q12}, [arg2]!
|
||||
|
||||
vmull.p64 q8, \reg1\()h, d21
|
||||
vmull.p64 \reg1, \reg1\()l, d20
|
||||
|
@ -238,7 +238,7 @@ _16B_reduction_loop:
|
|||
vmull.p64 q7, d15, d21
|
||||
veor.8 q7, q7, q8
|
||||
|
||||
vld1.64 {q0}, [arg2, :128]!
|
||||
vld1.64 {q0}, [arg2]!
|
||||
CPU_LE( vrev64.8 q0, q0 )
|
||||
vswp d0, d1
|
||||
veor.8 q7, q7, q0
|
||||
|
@ -335,7 +335,7 @@ _less_than_128:
|
|||
vmov.i8 q0, #0
|
||||
vmov s3, arg1_low32 // get the initial crc value
|
||||
|
||||
vld1.64 {q7}, [arg2, :128]!
|
||||
vld1.64 {q7}, [arg2]!
|
||||
CPU_LE( vrev64.8 q7, q7 )
|
||||
vswp d14, d15
|
||||
veor.8 q7, q7, q0
|
||||
|
|
|
@ -35,26 +35,15 @@ static int crct10dif_update(struct shash_desc *desc, const u8 *data,
|
|||
unsigned int length)
|
||||
{
|
||||
u16 *crc = shash_desc_ctx(desc);
|
||||
unsigned int l;
|
||||
|
||||
if (!may_use_simd()) {
|
||||
*crc = crc_t10dif_generic(*crc, data, length);
|
||||
if (length >= CRC_T10DIF_PMULL_CHUNK_SIZE && may_use_simd()) {
|
||||
kernel_neon_begin();
|
||||
*crc = crc_t10dif_pmull(*crc, data, length);
|
||||
kernel_neon_end();
|
||||
} else {
|
||||
if (unlikely((u32)data % CRC_T10DIF_PMULL_CHUNK_SIZE)) {
|
||||
l = min_t(u32, length, CRC_T10DIF_PMULL_CHUNK_SIZE -
|
||||
((u32)data % CRC_T10DIF_PMULL_CHUNK_SIZE));
|
||||
|
||||
*crc = crc_t10dif_generic(*crc, data, l);
|
||||
|
||||
length -= l;
|
||||
data += l;
|
||||
}
|
||||
if (length > 0) {
|
||||
kernel_neon_begin();
|
||||
*crc = crc_t10dif_pmull(*crc, data, length);
|
||||
kernel_neon_end();
|
||||
}
|
||||
*crc = crc_t10dif_generic(*crc, data, length);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -31,21 +31,25 @@
|
|||
|
||||
static unsigned long cpu_boot_addr;
|
||||
|
||||
static void __naked tf_generic_smc(u32 type, u32 arg1, u32 arg2)
|
||||
static void tf_generic_smc(u32 type, u32 arg1, u32 arg2)
|
||||
{
|
||||
register u32 r0 asm("r0") = type;
|
||||
register u32 r1 asm("r1") = arg1;
|
||||
register u32 r2 asm("r2") = arg2;
|
||||
|
||||
asm volatile(
|
||||
".arch_extension sec\n\t"
|
||||
"stmfd sp!, {r4 - r11, lr}\n\t"
|
||||
"stmfd sp!, {r4 - r11}\n\t"
|
||||
__asmeq("%0", "r0")
|
||||
__asmeq("%1", "r1")
|
||||
__asmeq("%2", "r2")
|
||||
"mov r3, #0\n\t"
|
||||
"mov r4, #0\n\t"
|
||||
"smc #0\n\t"
|
||||
"ldmfd sp!, {r4 - r11, pc}"
|
||||
"ldmfd sp!, {r4 - r11}\n\t"
|
||||
:
|
||||
: "r" (type), "r" (arg1), "r" (arg2)
|
||||
: "memory");
|
||||
: "r" (r0), "r" (r1), "r" (r2)
|
||||
: "memory", "r3", "r12", "lr");
|
||||
}
|
||||
|
||||
static int tf_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
|
||||
|
|
|
@ -467,6 +467,17 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
|
|||
#endif
|
||||
.endm
|
||||
|
||||
.macro uaccess_mask_range_ptr, addr:req, size:req, limit:req, tmp:req
|
||||
#ifdef CONFIG_CPU_SPECTRE
|
||||
sub \tmp, \limit, #1
|
||||
subs \tmp, \tmp, \addr @ tmp = limit - 1 - addr
|
||||
addhs \tmp, \tmp, #1 @ if (tmp >= 0) {
|
||||
subhss \tmp, \tmp, \size @ tmp = limit - (addr + size) }
|
||||
movlo \addr, #0 @ if (tmp < 0) addr = NULL
|
||||
csdb
|
||||
#endif
|
||||
.endm
|
||||
|
||||
.macro uaccess_disable, tmp, isb=1
|
||||
#ifdef CONFIG_CPU_SW_DOMAIN_PAN
|
||||
/*
|
||||
|
|
|
@ -107,6 +107,7 @@
|
|||
#define ARM_CPU_PART_SCORPION 0x510002d0
|
||||
|
||||
extern unsigned int processor_id;
|
||||
struct proc_info_list *lookup_processor(u32 midr);
|
||||
|
||||
#ifdef CONFIG_CPU_CP15
|
||||
#define read_cpuid(reg) \
|
||||
|
|
|
@ -25,7 +25,6 @@
|
|||
#ifndef __ASSEMBLY__
|
||||
struct irqaction;
|
||||
struct pt_regs;
|
||||
extern void migrate_irqs(void);
|
||||
|
||||
extern void asm_do_IRQ(unsigned int, struct pt_regs *);
|
||||
void handle_IRQ(unsigned int, struct pt_regs *);
|
||||
|
|
|
@ -23,7 +23,7 @@ struct mm_struct;
|
|||
/*
|
||||
* Don't change this structure - ASM code relies on it.
|
||||
*/
|
||||
extern struct processor {
|
||||
struct processor {
|
||||
/* MISC
|
||||
* get data abort address/flags
|
||||
*/
|
||||
|
@ -79,9 +79,13 @@ extern struct processor {
|
|||
unsigned int suspend_size;
|
||||
void (*do_suspend)(void *);
|
||||
void (*do_resume)(void *);
|
||||
} processor;
|
||||
};
|
||||
|
||||
#ifndef MULTI_CPU
|
||||
static inline void init_proc_vtable(const struct processor *p)
|
||||
{
|
||||
}
|
||||
|
||||
extern void cpu_proc_init(void);
|
||||
extern void cpu_proc_fin(void);
|
||||
extern int cpu_do_idle(void);
|
||||
|
@ -98,17 +102,50 @@ extern void cpu_reset(unsigned long addr, bool hvc) __attribute__((noreturn));
|
|||
extern void cpu_do_suspend(void *);
|
||||
extern void cpu_do_resume(void *);
|
||||
#else
|
||||
#define cpu_proc_init processor._proc_init
|
||||
#define cpu_proc_fin processor._proc_fin
|
||||
#define cpu_reset processor.reset
|
||||
#define cpu_do_idle processor._do_idle
|
||||
#define cpu_dcache_clean_area processor.dcache_clean_area
|
||||
#define cpu_set_pte_ext processor.set_pte_ext
|
||||
#define cpu_do_switch_mm processor.switch_mm
|
||||
|
||||
/* These three are private to arch/arm/kernel/suspend.c */
|
||||
#define cpu_do_suspend processor.do_suspend
|
||||
#define cpu_do_resume processor.do_resume
|
||||
extern struct processor processor;
|
||||
#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
#include <linux/smp.h>
|
||||
/*
|
||||
* This can't be a per-cpu variable because we need to access it before
|
||||
* per-cpu has been initialised. We have a couple of functions that are
|
||||
* called in a pre-emptible context, and so can't use smp_processor_id()
|
||||
* there, hence PROC_TABLE(). We insist in init_proc_vtable() that the
|
||||
* function pointers for these are identical across all CPUs.
|
||||
*/
|
||||
extern struct processor *cpu_vtable[];
|
||||
#define PROC_VTABLE(f) cpu_vtable[smp_processor_id()]->f
|
||||
#define PROC_TABLE(f) cpu_vtable[0]->f
|
||||
static inline void init_proc_vtable(const struct processor *p)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
*cpu_vtable[cpu] = *p;
|
||||
WARN_ON_ONCE(cpu_vtable[cpu]->dcache_clean_area !=
|
||||
cpu_vtable[0]->dcache_clean_area);
|
||||
WARN_ON_ONCE(cpu_vtable[cpu]->set_pte_ext !=
|
||||
cpu_vtable[0]->set_pte_ext);
|
||||
}
|
||||
#else
|
||||
#define PROC_VTABLE(f) processor.f
|
||||
#define PROC_TABLE(f) processor.f
|
||||
static inline void init_proc_vtable(const struct processor *p)
|
||||
{
|
||||
processor = *p;
|
||||
}
|
||||
#endif
|
||||
|
||||
#define cpu_proc_init PROC_VTABLE(_proc_init)
|
||||
#define cpu_check_bugs PROC_VTABLE(check_bugs)
|
||||
#define cpu_proc_fin PROC_VTABLE(_proc_fin)
|
||||
#define cpu_reset PROC_VTABLE(reset)
|
||||
#define cpu_do_idle PROC_VTABLE(_do_idle)
|
||||
#define cpu_dcache_clean_area PROC_TABLE(dcache_clean_area)
|
||||
#define cpu_set_pte_ext PROC_TABLE(set_pte_ext)
|
||||
#define cpu_do_switch_mm PROC_VTABLE(switch_mm)
|
||||
|
||||
/* These two are private to arch/arm/kernel/suspend.c */
|
||||
#define cpu_do_suspend PROC_VTABLE(do_suspend)
|
||||
#define cpu_do_resume PROC_VTABLE(do_resume)
|
||||
#endif
|
||||
|
||||
extern void cpu_resume(void);
|
||||
|
|
|
@ -124,8 +124,8 @@ extern void vfp_flush_hwstate(struct thread_info *);
|
|||
struct user_vfp;
|
||||
struct user_vfp_exc;
|
||||
|
||||
extern int vfp_preserve_user_clear_hwstate(struct user_vfp __user *,
|
||||
struct user_vfp_exc __user *);
|
||||
extern int vfp_preserve_user_clear_hwstate(struct user_vfp *,
|
||||
struct user_vfp_exc *);
|
||||
extern int vfp_restore_user_hwstate(struct user_vfp *,
|
||||
struct user_vfp_exc *);
|
||||
#endif
|
||||
|
|
|
@ -69,6 +69,14 @@ extern int __put_user_bad(void);
|
|||
static inline void set_fs(mm_segment_t fs)
|
||||
{
|
||||
current_thread_info()->addr_limit = fs;
|
||||
|
||||
/*
|
||||
* Prevent a mispredicted conditional call to set_fs from forwarding
|
||||
* the wrong address limit to access_ok under speculation.
|
||||
*/
|
||||
dsb(nsh);
|
||||
isb();
|
||||
|
||||
modify_domain(DOMAIN_KERNEL, fs ? DOMAIN_CLIENT : DOMAIN_MANAGER);
|
||||
}
|
||||
|
||||
|
@ -91,6 +99,32 @@ static inline void set_fs(mm_segment_t fs)
|
|||
#define __inttype(x) \
|
||||
__typeof__(__builtin_choose_expr(sizeof(x) > sizeof(0UL), 0ULL, 0UL))
|
||||
|
||||
/*
|
||||
* Sanitise a uaccess pointer such that it becomes NULL if addr+size
|
||||
* is above the current addr_limit.
|
||||
*/
|
||||
#define uaccess_mask_range_ptr(ptr, size) \
|
||||
((__typeof__(ptr))__uaccess_mask_range_ptr(ptr, size))
|
||||
static inline void __user *__uaccess_mask_range_ptr(const void __user *ptr,
|
||||
size_t size)
|
||||
{
|
||||
void __user *safe_ptr = (void __user *)ptr;
|
||||
unsigned long tmp;
|
||||
|
||||
asm volatile(
|
||||
" sub %1, %3, #1\n"
|
||||
" subs %1, %1, %0\n"
|
||||
" addhs %1, %1, #1\n"
|
||||
" subhss %1, %1, %2\n"
|
||||
" movlo %0, #0\n"
|
||||
: "+r" (safe_ptr), "=&r" (tmp)
|
||||
: "r" (size), "r" (current_thread_info()->addr_limit)
|
||||
: "cc");
|
||||
|
||||
csdb();
|
||||
return safe_ptr;
|
||||
}
|
||||
|
||||
/*
|
||||
* Single-value transfer routines. They automatically use the right
|
||||
* size if we just have the right pointer type. Note that the functions
|
||||
|
@ -362,6 +396,14 @@ do { \
|
|||
__pu_err; \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_CPU_SPECTRE
|
||||
/*
|
||||
* When mitigating Spectre variant 1.1, all accessors need to include
|
||||
* verification of the address space.
|
||||
*/
|
||||
#define __put_user(x, ptr) put_user(x, ptr)
|
||||
|
||||
#else
|
||||
#define __put_user(x, ptr) \
|
||||
({ \
|
||||
long __pu_err = 0; \
|
||||
|
@ -369,12 +411,6 @@ do { \
|
|||
__pu_err; \
|
||||
})
|
||||
|
||||
#define __put_user_error(x, ptr, err) \
|
||||
({ \
|
||||
__put_user_switch((x), (ptr), (err), __put_user_nocheck); \
|
||||
(void) 0; \
|
||||
})
|
||||
|
||||
#define __put_user_nocheck(x, __pu_ptr, __err, __size) \
|
||||
do { \
|
||||
unsigned long __pu_addr = (unsigned long)__pu_ptr; \
|
||||
|
@ -454,6 +490,7 @@ do { \
|
|||
: "r" (x), "i" (-EFAULT) \
|
||||
: "cc")
|
||||
|
||||
#endif /* !CONFIG_CPU_SPECTRE */
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
extern unsigned long __must_check
|
||||
|
|
|
@ -6,8 +6,8 @@
|
|||
void check_other_bugs(void)
|
||||
{
|
||||
#ifdef MULTI_CPU
|
||||
if (processor.check_bugs)
|
||||
processor.check_bugs();
|
||||
if (cpu_check_bugs)
|
||||
cpu_check_bugs();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
@ -46,6 +46,7 @@ saved_pc .req lr
|
|||
* features make this path too inefficient.
|
||||
*/
|
||||
ret_fast_syscall:
|
||||
__ret_fast_syscall:
|
||||
UNWIND(.fnstart )
|
||||
UNWIND(.cantunwind )
|
||||
disable_irq_notrace @ disable interrupts
|
||||
|
@ -75,6 +76,7 @@ fast_work_pending:
|
|||
* r0 first to avoid needing to save registers around each C function call.
|
||||
*/
|
||||
ret_fast_syscall:
|
||||
__ret_fast_syscall:
|
||||
UNWIND(.fnstart )
|
||||
UNWIND(.cantunwind )
|
||||
str r0, [sp, #S_R0 + S_OFF]! @ save returned r0
|
||||
|
@ -241,7 +243,7 @@ local_restart:
|
|||
tst r10, #_TIF_SYSCALL_WORK @ are we tracing syscalls?
|
||||
bne __sys_trace
|
||||
|
||||
invoke_syscall tbl, scno, r10, ret_fast_syscall
|
||||
invoke_syscall tbl, scno, r10, __ret_fast_syscall
|
||||
|
||||
add r1, sp, #S_OFF
|
||||
2: cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)
|
||||
|
|
|
@ -122,6 +122,9 @@ __mmap_switched_data:
|
|||
.long init_thread_union + THREAD_START_SP @ sp
|
||||
.size __mmap_switched_data, . - __mmap_switched_data
|
||||
|
||||
__FINIT
|
||||
.text
|
||||
|
||||
/*
|
||||
* This provides a C-API version of __lookup_processor_type
|
||||
*/
|
||||
|
@ -133,9 +136,6 @@ ENTRY(lookup_processor_type)
|
|||
ldmfd sp!, {r4 - r6, r9, pc}
|
||||
ENDPROC(lookup_processor_type)
|
||||
|
||||
__FINIT
|
||||
.text
|
||||
|
||||
/*
|
||||
* Read processor ID register (CP#15, CR0), and look up in the linker-built
|
||||
* supported processor list. Note that we can't use the absolute addresses
|
||||
|
|
|
@ -31,7 +31,6 @@
|
|||
#include <linux/smp.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/ratelimit.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/kallsyms.h>
|
||||
|
@ -119,64 +118,3 @@ int __init arch_probe_nr_irqs(void)
|
|||
return nr_irqs;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
static bool migrate_one_irq(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_data *d = irq_desc_get_irq_data(desc);
|
||||
const struct cpumask *affinity = irq_data_get_affinity_mask(d);
|
||||
struct irq_chip *c;
|
||||
bool ret = false;
|
||||
|
||||
/*
|
||||
* If this is a per-CPU interrupt, or the affinity does not
|
||||
* include this CPU, then we have nothing to do.
|
||||
*/
|
||||
if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
|
||||
return false;
|
||||
|
||||
if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
|
||||
affinity = cpu_online_mask;
|
||||
ret = true;
|
||||
}
|
||||
|
||||
c = irq_data_get_irq_chip(d);
|
||||
if (!c->irq_set_affinity)
|
||||
pr_debug("IRQ%u: unable to set affinity\n", d->irq);
|
||||
else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
|
||||
cpumask_copy(irq_data_get_affinity_mask(d), affinity);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* The current CPU has been marked offline. Migrate IRQs off this CPU.
|
||||
* If the affinity settings do not allow other CPUs, force them onto any
|
||||
* available CPU.
|
||||
*
|
||||
* Note: we must iterate over all IRQs, whether they have an attached
|
||||
* action structure or not, as we need to get chained interrupts too.
|
||||
*/
|
||||
void migrate_irqs(void)
|
||||
{
|
||||
unsigned int i;
|
||||
struct irq_desc *desc;
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
for_each_irq_desc(i, desc) {
|
||||
bool affinity_broken;
|
||||
|
||||
raw_spin_lock(&desc->lock);
|
||||
affinity_broken = migrate_one_irq(desc);
|
||||
raw_spin_unlock(&desc->lock);
|
||||
|
||||
if (affinity_broken)
|
||||
pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
|
||||
i, smp_processor_id());
|
||||
}
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
#endif /* CONFIG_HOTPLUG_CPU */
|
||||
|
|
|
@ -115,6 +115,11 @@ EXPORT_SYMBOL(elf_hwcap2);
|
|||
|
||||
#ifdef MULTI_CPU
|
||||
struct processor processor __ro_after_init;
|
||||
#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
struct processor *cpu_vtable[NR_CPUS] = {
|
||||
[0] = &processor,
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
#ifdef MULTI_TLB
|
||||
struct cpu_tlb_fns cpu_tlb __ro_after_init;
|
||||
|
@ -667,28 +672,33 @@ static void __init smp_build_mpidr_hash(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* locate processor in the list of supported processor types. The linker
|
||||
* builds this table for us from the entries in arch/arm/mm/proc-*.S
|
||||
*/
|
||||
struct proc_info_list *lookup_processor(u32 midr)
|
||||
{
|
||||
struct proc_info_list *list = lookup_processor_type(midr);
|
||||
|
||||
if (!list) {
|
||||
pr_err("CPU%u: configuration botched (ID %08x), CPU halted\n",
|
||||
smp_processor_id(), midr);
|
||||
while (1)
|
||||
/* can't use cpu_relax() here as it may require MMU setup */;
|
||||
}
|
||||
|
||||
return list;
|
||||
}
|
||||
|
||||
static void __init setup_processor(void)
|
||||
{
|
||||
struct proc_info_list *list;
|
||||
|
||||
/*
|
||||
* locate processor in the list of supported processor
|
||||
* types. The linker builds this table for us from the
|
||||
* entries in arch/arm/mm/proc-*.S
|
||||
*/
|
||||
list = lookup_processor_type(read_cpuid_id());
|
||||
if (!list) {
|
||||
pr_err("CPU configuration botched (ID %08x), unable to continue.\n",
|
||||
read_cpuid_id());
|
||||
while (1);
|
||||
}
|
||||
unsigned int midr = read_cpuid_id();
|
||||
struct proc_info_list *list = lookup_processor(midr);
|
||||
|
||||
cpu_name = list->cpu_name;
|
||||
__cpu_architecture = __get_cpu_architecture();
|
||||
|
||||
#ifdef MULTI_CPU
|
||||
processor = *list->proc;
|
||||
#endif
|
||||
init_proc_vtable(list->proc);
|
||||
#ifdef MULTI_TLB
|
||||
cpu_tlb = *list->tlb;
|
||||
#endif
|
||||
|
@ -700,7 +710,7 @@ static void __init setup_processor(void)
|
|||
#endif
|
||||
|
||||
pr_info("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
|
||||
cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
|
||||
list->cpu_name, midr, midr & 15,
|
||||
proc_arch[cpu_architecture()], get_cr());
|
||||
|
||||
snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
|
||||
|
|
|
@ -76,8 +76,6 @@ static int preserve_iwmmxt_context(struct iwmmxt_sigframe __user *frame)
|
|||
kframe->magic = IWMMXT_MAGIC;
|
||||
kframe->size = IWMMXT_STORAGE_SIZE;
|
||||
iwmmxt_task_copy(current_thread_info(), &kframe->storage);
|
||||
|
||||
err = __copy_to_user(frame, kframe, sizeof(*frame));
|
||||
} else {
|
||||
/*
|
||||
* For bug-compatibility with older kernels, some space
|
||||
|
@ -85,10 +83,14 @@ static int preserve_iwmmxt_context(struct iwmmxt_sigframe __user *frame)
|
|||
* Set the magic and size appropriately so that properly
|
||||
* written userspace can skip it reliably:
|
||||
*/
|
||||
__put_user_error(DUMMY_MAGIC, &frame->magic, err);
|
||||
__put_user_error(IWMMXT_STORAGE_SIZE, &frame->size, err);
|
||||
*kframe = (struct iwmmxt_sigframe) {
|
||||
.magic = DUMMY_MAGIC,
|
||||
.size = IWMMXT_STORAGE_SIZE,
|
||||
};
|
||||
}
|
||||
|
||||
err = __copy_to_user(frame, kframe, sizeof(*kframe));
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
@ -134,17 +136,18 @@ static int restore_iwmmxt_context(char __user **auxp)
|
|||
|
||||
static int preserve_vfp_context(struct vfp_sigframe __user *frame)
|
||||
{
|
||||
const unsigned long magic = VFP_MAGIC;
|
||||
const unsigned long size = VFP_STORAGE_SIZE;
|
||||
struct vfp_sigframe kframe;
|
||||
int err = 0;
|
||||
|
||||
__put_user_error(magic, &frame->magic, err);
|
||||
__put_user_error(size, &frame->size, err);
|
||||
memset(&kframe, 0, sizeof(kframe));
|
||||
kframe.magic = VFP_MAGIC;
|
||||
kframe.size = VFP_STORAGE_SIZE;
|
||||
|
||||
err = vfp_preserve_user_clear_hwstate(&kframe.ufp, &kframe.ufp_exc);
|
||||
if (err)
|
||||
return -EFAULT;
|
||||
return err;
|
||||
|
||||
return vfp_preserve_user_clear_hwstate(&frame->ufp, &frame->ufp_exc);
|
||||
return __copy_to_user(frame, &kframe, sizeof(kframe));
|
||||
}
|
||||
|
||||
static int restore_vfp_context(char __user **auxp)
|
||||
|
@ -296,30 +299,35 @@ static int
|
|||
setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set)
|
||||
{
|
||||
struct aux_sigframe __user *aux;
|
||||
struct sigcontext context;
|
||||
int err = 0;
|
||||
|
||||
__put_user_error(regs->ARM_r0, &sf->uc.uc_mcontext.arm_r0, err);
|
||||
__put_user_error(regs->ARM_r1, &sf->uc.uc_mcontext.arm_r1, err);
|
||||
__put_user_error(regs->ARM_r2, &sf->uc.uc_mcontext.arm_r2, err);
|
||||
__put_user_error(regs->ARM_r3, &sf->uc.uc_mcontext.arm_r3, err);
|
||||
__put_user_error(regs->ARM_r4, &sf->uc.uc_mcontext.arm_r4, err);
|
||||
__put_user_error(regs->ARM_r5, &sf->uc.uc_mcontext.arm_r5, err);
|
||||
__put_user_error(regs->ARM_r6, &sf->uc.uc_mcontext.arm_r6, err);
|
||||
__put_user_error(regs->ARM_r7, &sf->uc.uc_mcontext.arm_r7, err);
|
||||
__put_user_error(regs->ARM_r8, &sf->uc.uc_mcontext.arm_r8, err);
|
||||
__put_user_error(regs->ARM_r9, &sf->uc.uc_mcontext.arm_r9, err);
|
||||
__put_user_error(regs->ARM_r10, &sf->uc.uc_mcontext.arm_r10, err);
|
||||
__put_user_error(regs->ARM_fp, &sf->uc.uc_mcontext.arm_fp, err);
|
||||
__put_user_error(regs->ARM_ip, &sf->uc.uc_mcontext.arm_ip, err);
|
||||
__put_user_error(regs->ARM_sp, &sf->uc.uc_mcontext.arm_sp, err);
|
||||
__put_user_error(regs->ARM_lr, &sf->uc.uc_mcontext.arm_lr, err);
|
||||
__put_user_error(regs->ARM_pc, &sf->uc.uc_mcontext.arm_pc, err);
|
||||
__put_user_error(regs->ARM_cpsr, &sf->uc.uc_mcontext.arm_cpsr, err);
|
||||
context = (struct sigcontext) {
|
||||
.arm_r0 = regs->ARM_r0,
|
||||
.arm_r1 = regs->ARM_r1,
|
||||
.arm_r2 = regs->ARM_r2,
|
||||
.arm_r3 = regs->ARM_r3,
|
||||
.arm_r4 = regs->ARM_r4,
|
||||
.arm_r5 = regs->ARM_r5,
|
||||
.arm_r6 = regs->ARM_r6,
|
||||
.arm_r7 = regs->ARM_r7,
|
||||
.arm_r8 = regs->ARM_r8,
|
||||
.arm_r9 = regs->ARM_r9,
|
||||
.arm_r10 = regs->ARM_r10,
|
||||
.arm_fp = regs->ARM_fp,
|
||||
.arm_ip = regs->ARM_ip,
|
||||
.arm_sp = regs->ARM_sp,
|
||||
.arm_lr = regs->ARM_lr,
|
||||
.arm_pc = regs->ARM_pc,
|
||||
.arm_cpsr = regs->ARM_cpsr,
|
||||
|
||||
__put_user_error(current->thread.trap_no, &sf->uc.uc_mcontext.trap_no, err);
|
||||
__put_user_error(current->thread.error_code, &sf->uc.uc_mcontext.error_code, err);
|
||||
__put_user_error(current->thread.address, &sf->uc.uc_mcontext.fault_address, err);
|
||||
__put_user_error(set->sig[0], &sf->uc.uc_mcontext.oldmask, err);
|
||||
.trap_no = current->thread.trap_no,
|
||||
.error_code = current->thread.error_code,
|
||||
.fault_address = current->thread.address,
|
||||
.oldmask = set->sig[0],
|
||||
};
|
||||
|
||||
err |= __copy_to_user(&sf->uc.uc_mcontext, &context, sizeof(context));
|
||||
|
||||
err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set));
|
||||
|
||||
|
@ -336,7 +344,7 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set)
|
|||
if (err == 0)
|
||||
err |= preserve_vfp_context(&aux->vfp);
|
||||
#endif
|
||||
__put_user_error(0, &aux->end_magic, err);
|
||||
err |= __put_user(0, &aux->end_magic);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
@ -468,7 +476,7 @@ setup_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs)
|
|||
/*
|
||||
* Set uc.uc_flags to a value which sc.trap_no would never have.
|
||||
*/
|
||||
__put_user_error(0x5ac3c35a, &frame->uc.uc_flags, err);
|
||||
err = __put_user(0x5ac3c35a, &frame->uc.uc_flags);
|
||||
|
||||
err |= setup_sigframe(frame, regs, set);
|
||||
if (err == 0)
|
||||
|
@ -488,8 +496,8 @@ setup_rt_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs)
|
|||
|
||||
err |= copy_siginfo_to_user(&frame->info, &ksig->info);
|
||||
|
||||
__put_user_error(0, &frame->sig.uc.uc_flags, err);
|
||||
__put_user_error(NULL, &frame->sig.uc.uc_link, err);
|
||||
err |= __put_user(0, &frame->sig.uc.uc_flags);
|
||||
err |= __put_user(NULL, &frame->sig.uc.uc_link);
|
||||
|
||||
err |= __save_altstack(&frame->sig.uc.uc_stack, regs->ARM_sp);
|
||||
err |= setup_sigframe(&frame->sig, regs, set);
|
||||
|
|
|
@ -42,6 +42,7 @@
|
|||
#include <asm/mmu_context.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/procinfo.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/tlbflush.h>
|
||||
|
@ -102,6 +103,30 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
|
|||
#endif
|
||||
}
|
||||
|
||||
#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
static int secondary_biglittle_prepare(unsigned int cpu)
|
||||
{
|
||||
if (!cpu_vtable[cpu])
|
||||
cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL);
|
||||
|
||||
return cpu_vtable[cpu] ? 0 : -ENOMEM;
|
||||
}
|
||||
|
||||
static void secondary_biglittle_init(void)
|
||||
{
|
||||
init_proc_vtable(lookup_processor(read_cpuid_id())->proc);
|
||||
}
|
||||
#else
|
||||
static int secondary_biglittle_prepare(unsigned int cpu)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void secondary_biglittle_init(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||
{
|
||||
int ret;
|
||||
|
@ -109,6 +134,10 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
|||
if (!smp_ops.smp_boot_secondary)
|
||||
return -ENOSYS;
|
||||
|
||||
ret = secondary_biglittle_prepare(cpu);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* We need to tell the secondary core where to find
|
||||
* its stack and the page tables.
|
||||
|
@ -225,7 +254,7 @@ int __cpu_disable(void)
|
|||
/*
|
||||
* OK - migrate IRQs away from this CPU
|
||||
*/
|
||||
migrate_irqs();
|
||||
irq_migrate_all_off_this_cpu();
|
||||
|
||||
/*
|
||||
* Flush user cache and TLB mappings, and then remove this CPU
|
||||
|
@ -360,6 +389,8 @@ asmlinkage void secondary_start_kernel(void)
|
|||
struct mm_struct *mm = &init_mm;
|
||||
unsigned int cpu;
|
||||
|
||||
secondary_biglittle_init();
|
||||
|
||||
/*
|
||||
* The identity mapping is uncached (strongly ordered), so
|
||||
* switch away from it before attempting any exclusive accesses.
|
||||
|
@ -691,6 +722,21 @@ void smp_send_stop(void)
|
|||
pr_warn("SMP: failed to stop secondary CPUs\n");
|
||||
}
|
||||
|
||||
/* In case panic() and panic() called at the same time on CPU1 and CPU2,
|
||||
* and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
|
||||
* CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
|
||||
* kdump fails. So split out the panic_smp_self_stop() and add
|
||||
* set_cpu_online(smp_processor_id(), false).
|
||||
*/
|
||||
void panic_smp_self_stop(void)
|
||||
{
|
||||
pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
|
||||
smp_processor_id());
|
||||
set_cpu_online(smp_processor_id(), false);
|
||||
while (1)
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
/*
|
||||
* not supported here
|
||||
*/
|
||||
|
|
|
@ -277,6 +277,7 @@ asmlinkage long sys_oabi_epoll_wait(int epfd,
|
|||
int maxevents, int timeout)
|
||||
{
|
||||
struct epoll_event *kbuf;
|
||||
struct oabi_epoll_event e;
|
||||
mm_segment_t fs;
|
||||
long ret, err, i;
|
||||
|
||||
|
@ -295,8 +296,11 @@ asmlinkage long sys_oabi_epoll_wait(int epfd,
|
|||
set_fs(fs);
|
||||
err = 0;
|
||||
for (i = 0; i < ret; i++) {
|
||||
__put_user_error(kbuf[i].events, &events->events, err);
|
||||
__put_user_error(kbuf[i].data, &events->data, err);
|
||||
e.events = kbuf[i].events;
|
||||
e.data = kbuf[i].data;
|
||||
err = __copy_to_user(events, &e, sizeof(e));
|
||||
if (err)
|
||||
break;
|
||||
events++;
|
||||
}
|
||||
kfree(kbuf);
|
||||
|
|
|
@ -93,11 +93,7 @@ ENTRY(arm_copy_from_user)
|
|||
#ifdef CONFIG_CPU_SPECTRE
|
||||
get_thread_info r3
|
||||
ldr r3, [r3, #TI_ADDR_LIMIT]
|
||||
adds ip, r1, r2 @ ip=addr+size
|
||||
sub r3, r3, #1 @ addr_limit - 1
|
||||
cmpcc ip, r3 @ if (addr+size > addr_limit - 1)
|
||||
movcs r1, #0 @ addr = NULL
|
||||
csdb
|
||||
uaccess_mask_range_ptr r1, r2, r3, ip
|
||||
#endif
|
||||
|
||||
#include "copy_template.S"
|
||||
|
|
|
@ -94,6 +94,11 @@
|
|||
|
||||
ENTRY(__copy_to_user_std)
|
||||
WEAK(arm_copy_to_user)
|
||||
#ifdef CONFIG_CPU_SPECTRE
|
||||
get_thread_info r3
|
||||
ldr r3, [r3, #TI_ADDR_LIMIT]
|
||||
uaccess_mask_range_ptr r0, r2, r3, ip
|
||||
#endif
|
||||
|
||||
#include "copy_template.S"
|
||||
|
||||
|
@ -108,4 +113,3 @@ ENDPROC(__copy_to_user_std)
|
|||
rsb r0, r0, r2
|
||||
copy_abort_end
|
||||
.popsection
|
||||
|
||||
|
|
|
@ -152,7 +152,8 @@ arm_copy_to_user(void __user *to, const void *from, unsigned long n)
|
|||
n = __copy_to_user_std(to, from, n);
|
||||
uaccess_restore(ua_flags);
|
||||
} else {
|
||||
n = __copy_to_user_memcpy(to, from, n);
|
||||
n = __copy_to_user_memcpy(uaccess_mask_range_ptr(to, n),
|
||||
from, n);
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue