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clk: sunxi-ng: sun6i: Export video PLLs 

The 2x outputs of the 2 video PLL clocks are directly used by the
HDMI controller block.

Export them so they can be referenced in the device tree.

Fixes: c6e6c96d8f ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai 2017-09-29 16:22:53 +08:00 committed by Maxime Ripard
parent 5da672cff0
commit 80815004a4
2 changed files with 10 additions and 2 deletions
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8
drivers/clk/sunxi-ng/ccu-sun6i-a31.h
View File

@ -27,7 +27,9 @@
#define CLK_PLL_AUDIO_4X 4
#define CLK_PLL_AUDIO_8X 5
#define CLK_PLL_VIDEO0 6
#define CLK_PLL_VIDEO0_2X 7
/* The PLL_VIDEO0_2X clock is exported */
#define CLK_PLL_VE 8
#define CLK_PLL_DDR 9
@ -35,7 +37,9 @@
#define CLK_PLL_PERIPH_2X 11
#define CLK_PLL_VIDEO1 12
#define CLK_PLL_VIDEO1_2X 13
/* The PLL_VIDEO1_2X clock is exported */
#define CLK_PLL_GPU 14
#define CLK_PLL_MIPI 15
#define CLK_PLL9 16

4
include/dt-bindings/clock/sun6i-a31-ccu.h
View File

@ -43,8 +43,12 @@
#ifndef _DT_BINDINGS_CLK_SUN6I_A31_H_
#define _DT_BINDINGS_CLK_SUN6I_A31_H_
#define CLK_PLL_VIDEO0_2X 7
#define CLK_PLL_PERIPH 10
#define CLK_PLL_VIDEO1_2X 13
#define CLK_CPU 18
#define CLK_AHB1_MIPIDSI 23