drm: brainlcd: set LCDIF clock

2021-07-18 01:32:09 +09:00 · 2021-07-18 01:32:09 +09:00 · 7f092d92e4
parent bee08820ee
commit 7f092d92e4
1 changed files with 2 additions and 0 deletions
--- a/drivers/gpu/drm/tiny/brain.c
+++ b/drivers/gpu/drm/tiny/brain.c
@ -285,6 +285,8 @@ static void brain_enable(struct drm_simple_display_pipe *pipe,
 	writel(TIMING_CMD_HOLD(1) | TIMING_CMD_SETUP(1) | TIMING_DATA_HOLD(1) | TIMING_DATA_SETUP(1),
 		ili->base + LCDC_TIMING);

+	clk_set_rate(ili->clk_lcdif, m->vtotal * m->htotal * 60 * 2);
+
 	/* Initialize LCD */
 	/* Decrease the bus width to 8-bit temporarily */
 	valid = CTRL1_GET_BYTE_PACKAGING(readl(ili->base + LCDC_CTRL1));