MLK-23421: dt-bindings: mailbox: imx-mu: add SECO MU support

i.MX8/8X SECO MU is dedicated for communication between kernel
and SECO. To use SECO MU more effectivly, add "fsl,imx8-seco-mu"
compatible to support fast IPC.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
This commit is contained in:
Franck LENORMAND 2020-03-04 10:58:16 +01:00
parent 13b8e3b1fa
commit 7dd4eb4742
1 changed files with 9 additions and 0 deletions

View File

@ -23,6 +23,8 @@ Required properties:
be included together with SoC specific compatible.
There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu"
compatible to support it.
To communicate with i.MX8 SCU, "fsl,imx8-mu-seco" could be
used for fast IPC
- reg : Should contain the registers location and length
- interrupts : Interrupt number. The interrupt specifier format depends
on the interrupt controller parent.
@ -54,3 +56,10 @@ lsio_mu0: mailbox@5d1b0000 {
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
};
sec_mu0: mailbox@31560000 {
compatible = "fsl,imx8-mu-seco";
reg = <0x31560000 0x10000>;
interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
power-domains = <&pd IMX_SC_R_SECO_MU_2>;
};