MLK-23421: dt-bindings: mailbox: imx-mu: add SECO MU support
i.MX8/8X SECO MU is dedicated for communication between kernel and SECO. To use SECO MU more effectivly, add "fsl,imx8-seco-mu" compatible to support fast IPC. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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@ -23,6 +23,8 @@ Required properties:
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be included together with SoC specific compatible.
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There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu"
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compatible to support it.
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To communicate with i.MX8 SCU, "fsl,imx8-mu-seco" could be
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used for fast IPC
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- reg : Should contain the registers location and length
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- interrupts : Interrupt number. The interrupt specifier format depends
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on the interrupt controller parent.
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@ -54,3 +56,10 @@ lsio_mu0: mailbox@5d1b0000 {
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interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <2>;
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};
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sec_mu0: mailbox@31560000 {
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compatible = "fsl,imx8-mu-seco";
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reg = <0x31560000 0x10000>;
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interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <2>;
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power-domains = <&pd IMX_SC_R_SECO_MU_2>;
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};
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