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ARM: tegra: Initialize flow controller from DT

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Use a matching device tree node to initialize the flow controller driver
instead of hard-coding the I/O address. This is necessary to get rid of
the iomap.h include, which in turn make it easier to share this code
with 64-bit Tegra SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Thierry Reding 2014-08-26 08:14:04 +02:00 committed by Stephen Warren
parent 9fc3bf5dc2
commit 783944feaa
3 changed files with 41 additions and 7 deletions
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44
arch/arm/mach-tegra/flowctrl.c
View File

@ -22,11 +22,12 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <soc/tegra/fuse.h>
#include "flowctrl.h"
#include "iomap.h"
static u8 flowctrl_offset_halt_cpu[] = {
FLOW_CTRL_HALT_CPU0_EVENTS,
@ -42,23 +43,22 @@ static u8 flowctrl_offset_cpu_csr[] = {
FLOW_CTRL_CPU1_CSR + 16,
};
static void __iomem *tegra_flowctrl_base;
static void flowctrl_update(u8 offset, u32 value)
{
void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;
writel(value, addr);
writel(value, tegra_flowctrl_base + offset);
/* ensure the update has reached the flow controller */
wmb();
readl_relaxed(addr);
readl_relaxed(tegra_flowctrl_base + offset);
}
u32 flowctrl_read_cpu_csr(unsigned int cpuid)
{
u8 offset = flowctrl_offset_cpu_csr[cpuid];
void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;
return readl(addr);
return readl(tegra_flowctrl_base + offset);
}
void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
@ -139,3 +139,33 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid)
reg |= FLOW_CTRL_CSR_EVENT_FLAG; /* clear event */
flowctrl_write_cpu_csr(cpuid, reg);
}
static const struct of_device_id matches[] __initconst = {
{ .compatible = "nvidia,tegra124-flowctrl" },
{ .compatible = "nvidia,tegra114-flowctrl" },
{ .compatible = "nvidia,tegra30-flowctrl" },
{ .compatible = "nvidia,tegra20-flowctrl" },
{ }
};
void __init tegra_flowctrl_init(void)
{
/* hardcoded fallback if device tree node is missing */
unsigned long base = 0x60007000;
unsigned long size = SZ_4K;
struct device_node *np;
np = of_find_matching_node(NULL, matches);
if (np) {
struct resource res;
if (of_address_to_resource(np, 0, &res) == 0) {
size = resource_size(&res);
base = res.start;
}
of_node_put(np);
}
tegra_flowctrl_base = ioremap_nocache(base, size);
}

2
arch/arm/mach-tegra/flowctrl.h
View File

@ -59,6 +59,8 @@ void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value);
void flowctrl_cpu_suspend_enter(unsigned int cpuid);
void flowctrl_cpu_suspend_exit(unsigned int cpuid);
void tegra_flowctrl_init(void);
#endif
#endif

2
arch/arm/mach-tegra/tegra.c
View File

@ -48,6 +48,7 @@
#include "board.h"
#include "common.h"
#include "cpuidle.h"
#include "flowctrl.h"
#include "iomap.h"
#include "irq.h"
#include "pm.h"
@ -74,6 +75,7 @@ static void __init tegra_init_early(void)
{
of_register_trusted_foundations();
tegra_cpu_reset_handler_init();
tegra_flowctrl_init();
}
static void __init tegra_dt_init_irq(void)