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drm/amd/display: Add more Clock Sources to DCN2.1
[ Upstream commit 1622711beebe887e4f0f8237fea1f09bb48e9a51 ] [WHY] When enabling HDMI on ComboPHY, there are not enough clock sources to complete display detection. [HOW] Initialize more clock sources. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -826,6 +826,8 @@ enum dcn20_clk_src_array_id {
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DCN20_CLK_SRC_PLL0,
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DCN20_CLK_SRC_PLL1,
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DCN20_CLK_SRC_PLL2,
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DCN20_CLK_SRC_PLL3,
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DCN20_CLK_SRC_PLL4,
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DCN20_CLK_SRC_TOTAL_DCN21
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};
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@ -1498,6 +1500,14 @@ static bool construct(
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dcn21_clock_source_create(ctx, ctx->dc_bios,
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CLOCK_SOURCE_COMBO_PHY_PLL2,
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&clk_src_regs[2], false);
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pool->base.clock_sources[DCN20_CLK_SRC_PLL3] =
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dcn21_clock_source_create(ctx, ctx->dc_bios,
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CLOCK_SOURCE_COMBO_PHY_PLL3,
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&clk_src_regs[3], false);
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pool->base.clock_sources[DCN20_CLK_SRC_PLL4] =
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dcn21_clock_source_create(ctx, ctx->dc_bios,
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CLOCK_SOURCE_COMBO_PHY_PLL4,
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&clk_src_regs[4], false);
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pool->base.clk_src_count = DCN20_CLK_SRC_TOTAL_DCN21;
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