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ARM: vf610: use zero based naming for GPIO nodes 

On Vybrid, all peripherals are numbered starting with zero,
including the GPIO and PORT module. However, the labels of the
corresponding device tree nodes start with one, which is confusing.
Fix that by renaming the labels of the gpio nodes in the device
tree.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Stefan Agner 2015-01-16 18:06:15 +01:00 committed by Shawn Guo
parent 677940258d
commit 767139540c
5 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
View File

@ -35,7 +35,7 @@
regulator-name = "usbh_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
gpio = <&gpio2 19 GPIO_ACTIVE_LOW>;
vin-supply = <&sys_5v0_reg>;
};
};

2
arch/arm/boot/dts/vf-colibri.dtsi
View File

@ -31,7 +31,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
bus-width = <4>;
cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
};
&fec1 {

10
arch/arm/boot/dts/vf500.dtsi
View File

@ -94,23 +94,23 @@
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
};
&gpio1 {
&gpio0 {
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
};
&gpio2 {
&gpio1 {
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
};
&gpio3 {
&gpio2 {
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
};
&gpio4 {
&gpio3 {
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
};
&gpio5 {
&gpio4 {
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
};

2
arch/arm/boot/dts/vf610-twr.dts
View File

@ -123,7 +123,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
bus-width = <4>;
cd-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
cd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
status = "okay";
};

20
arch/arm/boot/dts/vfxxx.dtsi
View File

@ -22,11 +22,11 @@
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
usbphy0 = &usbphy0;
usbphy1 = &usbphy1;
};
@ -216,7 +216,7 @@
#gpio-range-cells = <3>;
};
gpio1: gpio@40049000 {
gpio0: gpio@40049000 {
compatible = "fsl,vf610-gpio";
reg = <0x40049000 0x1000 0x400ff000 0x40>;
gpio-controller;
@ -226,7 +226,7 @@
gpio-ranges = <&iomuxc 0 0 32>;
};
gpio2: gpio@4004a000 {
gpio1: gpio@4004a000 {
compatible = "fsl,vf610-gpio";
reg = <0x4004a000 0x1000 0x400ff040 0x40>;
gpio-controller;
@ -236,7 +236,7 @@
gpio-ranges = <&iomuxc 0 32 32>;
};
gpio3: gpio@4004b000 {
gpio2: gpio@4004b000 {
compatible = "fsl,vf610-gpio";
reg = <0x4004b000 0x1000 0x400ff080 0x40>;
gpio-controller;
@ -246,7 +246,7 @@
gpio-ranges = <&iomuxc 0 64 32>;
};
gpio4: gpio@4004c000 {
gpio3: gpio@4004c000 {
compatible = "fsl,vf610-gpio";
reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
gpio-controller;
@ -256,7 +256,7 @@
gpio-ranges = <&iomuxc 0 96 32>;
};
gpio5: gpio@4004d000 {
gpio4: gpio@4004d000 {
compatible = "fsl,vf610-gpio";
reg = <0x4004d000 0x1000 0x400ff100 0x40>;
gpio-controller;