MLK-24931-2: dts: arm64: freescale: imx8mm evk iqaudio dacpro

Enable support for IQauidio dacpro audio hats on
iMX8MMini EVK.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit f4122d1b5c3e66c3fe731ea19e6e6e17c2000af6)
This commit is contained in:
Adrian Alonso 2020-11-10 14:21:29 -06:00
parent c71bae8eef
commit 70d86b05ac
2 changed files with 80 additions and 1 deletions

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@ -57,7 +57,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb imx8mm-evk-rpmsg.dtb imx8mm-evk-rm67191
imx8mm-evk-qca-wifi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk-ak4497.dtb imx8mm-evk-ak5558.dtb imx8mm-evk-audio-tdm.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk-8mic-revE.dtb imx8mm-evk-8mic-swpdm.dtb \
imx8mm-evk-iqaudio-dacplus.dtb
imx8mm-evk-iqaudio-dacplus.dtb imx8mm-evk-iqaudio-dacpro.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ab2.dtb imx8mm-ab2-m4.dtb imx8mm-ddr4-ab2.dtb imx8mm-ddr4-ab2-m4.dtb \
imx8mm-ddr4-ab2-revb.dtb imx8mm-ddr4-ab2-m4-revb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb imx8mn-evk-rm67191.dtb imx8mn-ddr4-evk.dtb imx8mn-ddr4-evk-ak5558.dtb \

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@ -0,0 +1,79 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2020 NXP.
*/
#include "imx8mm-evk.dts"
/ {
reg_3v3_vext: regulator-3v3-vext {
compatible = "regulator-fixed";
regulator-name = "3V3_VEXT";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
sound-ak4458 {
status = "disabled";
};
sound-micfil {
status = "disabled";
};
sound-pcm512x {
compatible = "fsl,imx-audio-pcm512x";
model = "pcm512x-audio";
audio-cpu = <&sai5>;
audio-codec = <&pcm512x>;
format = "i2s";
audio-widgets =
"Line", "Left Line Out Jack",
"Line", "Right Line Out Jack";
audio-routing =
"Left Line Out Jack", "OUTL",
"Right Line Out Jack", "OUTR";
dac,24db_digital_gain;
};
};
&i2c3 {
ak4458_1: ak4458@10 {
status = "disabled";
};
ak4458_2: ak4458@12 {
status = "disabled";
};
ak4497: ak4497@11 {
status = "disabled";
};
pcm512x: pcm512x@4c {
compatible = "ti,pcm5142";
reg = <0x4c>;
AVDD-supply = <&reg_3v3_vext>;
DVDD-supply = <&reg_3v3_vext>;
CPVDD-supply = <&reg_3v3_vext>;
};
};
&iomuxc {
pinctrl_sai5: sai5grp {
fsl,pins = <
MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6
>;
};
};
&micfil {
status = "disabled";
};
&sai5 {
status = "okay";
};