MLK-23552-3 clk: imx8dxl-acm: Update ACM clock driver

Fix wrong compatible string which is duplicated with iMX8QXP and cause
register failed. And update clock tree according to iMX8DXL ADD, remove
unused inputs to audio mux.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
This commit is contained in:
Ye Li 2020-03-09 00:06:38 -07:00
parent 4ad83f42e3
commit 6d03fcd18f

View File

@ -18,15 +18,20 @@
#include <dt-bindings/clock/imx8-clock.h>
struct imx8dxl_acm_priv {
void __iomem *reg;
u32 regs[0x20];
};
static const char *aud_clk_sels[] = {
"aud_rec_clk0_lpcg_clk",
"aud_rec_clk1_lpcg_clk",
"ext_aud_mclk0",
"ext_aud_mclk1",
"esai0_rx_clk",
"esai0_rx_hf_clk",
"esai0_tx_clk",
"esai0_tx_hf_clk",
"dummy",
"dummy",
"dummy",
"dummy",
"spdif0_rx",
"sai0_rx_bclk",
"sai0_tx_bclk",
@ -44,7 +49,7 @@ static const char *mclk_out_sels[] = {
"spdif0_rx",
"dummy",
"dummy",
"sai4_rx_bclk",
"dummy",
};
static const char *sai_mclk_sels[] = {
@ -54,13 +59,6 @@ static const char *sai_mclk_sels[] = {
"acm_aud_clk1_sel",
};
static const char *esai_mclk_sels[] = {
"aud_pll_div_clk0_lpcg_clk",
"aud_pll_div_clk1_lpcg_clk",
"acm_aud_clk0_sel",
"acm_aud_clk1_sel",
};
static const char *spdif_mclk_sels[] = {
"aud_pll_div_clk0_lpcg_clk",
"aud_pll_div_clk1_lpcg_clk",
@ -75,11 +73,12 @@ static const char *mqs_mclk_sels[] = {
"acm_aud_clk1_sel",
};
static int imx8qxp_acm_clk_probe(struct platform_device *pdev)
static int imx8dxl_acm_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct clk_onecell_data *clk_data;
struct imx8dxl_acm_priv *priv;
struct resource *res;
struct clk **clks;
void __iomem *base;
@ -91,6 +90,14 @@ static int imx8qxp_acm_clk_probe(struct platform_device *pdev)
if (!base)
return -ENOMEM;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->reg = base;
platform_set_drvdata(pdev, priv);
clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL);
if (!clk_data)
return -ENOMEM;
@ -124,10 +131,6 @@ static int imx8qxp_acm_clk_probe(struct platform_device *pdev)
clks[IMX_ADMA_EXT_AUD_MCLK0] = imx_clk_fixed("ext_aud_mclk0", 0);
clks[IMX_ADMA_EXT_AUD_MCLK1] = imx_clk_fixed("ext_aud_mclk1", 0);
clks[IMX_ADMA_ESAI0_RX_CLK] = imx_clk_fixed("esai0_rx_clk", 0);
clks[IMX_ADMA_ESAI0_RX_HF_CLK] = imx_clk_fixed("esai0_rx_hf_clk", 0);
clks[IMX_ADMA_ESAI0_TX_CLK] = imx_clk_fixed("esai0_tx_clk", 0);
clks[IMX_ADMA_ESAI0_TX_HF_CLK] = imx_clk_fixed("esai0_tx_hf_clk", 0);
clks[IMX_ADMA_SPDIF0_RX] = imx_clk_fixed("spdif0_rx", 0);
clks[IMX_ADMA_SAI0_RX_BCLK] = imx_clk_fixed("sai0_rx_bclk", 0);
clks[IMX_ADMA_SAI0_TX_BCLK] = imx_clk_fixed("sai0_tx_bclk", 0);
@ -135,8 +138,6 @@ static int imx8qxp_acm_clk_probe(struct platform_device *pdev)
clks[IMX_ADMA_SAI1_TX_BCLK] = imx_clk_fixed("sai1_tx_bclk", 0);
clks[IMX_ADMA_SAI2_RX_BCLK] = imx_clk_fixed("sai2_rx_bclk", 0);
clks[IMX_ADMA_SAI3_RX_BCLK] = imx_clk_fixed("sai3_rx_bclk", 0);
clks[IMX_ADMA_SAI4_RX_BCLK] = imx_clk_fixed("sai4_rx_bclk", 0);
clks[IMX_ADMA_ACM_AUD_CLK0_SEL] = imx_clk_mux("acm_aud_clk0_sel", base+0x000000, 0, 5, aud_clk_sels, ARRAY_SIZE(aud_clk_sels));
clks[IMX_ADMA_ACM_AUD_CLK1_CLK] = imx_clk_mux("acm_aud_clk1_sel", base+0x010000, 0, 5, aud_clk_sels, ARRAY_SIZE(aud_clk_sels));
@ -144,13 +145,10 @@ static int imx8qxp_acm_clk_probe(struct platform_device *pdev)
clks[IMX_ADMA_ACM_MCLKOUT0_SEL] = imx_clk_mux("acm_mclkout0_sel", base+0x020000, 0, 3, mclk_out_sels, ARRAY_SIZE(mclk_out_sels));
clks[IMX_ADMA_ACM_MCLKOUT1_SEL] = imx_clk_mux("acm_mclkout1_sel", base+0x030000, 0, 3, mclk_out_sels, ARRAY_SIZE(mclk_out_sels));
clks[IMX_ADMA_ACM_ESAI0_MCLK_SEL] = imx_clk_mux("acm_esai0_mclk_sel", base+0x060000, 0, 2, esai_mclk_sels, ARRAY_SIZE(esai_mclk_sels));
clks[IMX_ADMA_ACM_SAI0_MCLK_SEL] = imx_clk_mux("acm_sai0_mclk_sel", base+0x0E0000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
clks[IMX_ADMA_ACM_SAI1_MCLK_SEL] = imx_clk_mux("acm_sai1_mclk_sel", base+0x0F0000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
clks[IMX_ADMA_ACM_SAI2_MCLK_SEL] = imx_clk_mux("acm_sai2_mclk_sel", base+0x100000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
clks[IMX_ADMA_ACM_SAI3_MCLK_SEL] = imx_clk_mux("acm_sai3_mclk_sel", base+0x110000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
clks[IMX_ADMA_ACM_SAI4_MCLK_SEL] = imx_clk_mux("acm_sai4_mclk_sel", base+0x140000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
clks[IMX_ADMA_ACM_SAI5_MCLK_SEL] = imx_clk_mux("acm_sai5_mclk_sel", base+0x150000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
clks[IMX_ADMA_ACM_SPDIF0_TX_CLK_SEL] = imx_clk_mux("acm_spdif0_mclk_sel", base+0x1A0000, 0, 2, spdif_mclk_sels, ARRAY_SIZE(spdif_mclk_sels));
clks[IMX_ADMA_ACM_MQS_TX_CLK_SEL] = imx_clk_mux("acm_mqs_mclk_sel", base+0x1C0000, 0, 2, mqs_mclk_sels, ARRAY_SIZE(mqs_mclk_sels));
@ -164,22 +162,64 @@ static int imx8qxp_acm_clk_probe(struct platform_device *pdev)
return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
}
static const struct of_device_id imx8qxp_acm_match[] = {
{ .compatible = "nxp,imx8qxp-acm", },
static const struct of_device_id imx8dxl_acm_match[] = {
{ .compatible = "nxp,imx8dxl-acm", },
{ /* sentinel */ }
};
static struct platform_driver imx8qxp_acm_clk_driver = {
.driver = {
.name = "imx8qxp-acm",
.of_match_table = imx8qxp_acm_match,
.suppress_bind_attrs = true,
},
.probe = imx8qxp_acm_clk_probe,
static int __maybe_unused imx8dxl_acm_suspend(struct device *dev)
{
struct imx8dxl_acm_priv *priv = dev_get_drvdata(dev);
priv->regs[0] = readl_relaxed(priv->reg + 0x000000);
priv->regs[1] = readl_relaxed(priv->reg + 0x010000);
priv->regs[2] = readl_relaxed(priv->reg + 0x020000);
priv->regs[3] = readl_relaxed(priv->reg + 0x030000);
priv->regs[14] = readl_relaxed(priv->reg + 0x0E0000);
priv->regs[15] = readl_relaxed(priv->reg + 0x0F0000);
priv->regs[16] = readl_relaxed(priv->reg + 0x100000);
priv->regs[17] = readl_relaxed(priv->reg + 0x110000);
priv->regs[26] = readl_relaxed(priv->reg + 0x1A0000);
priv->regs[28] = readl_relaxed(priv->reg + 0x1C0000);
return 0;
}
static int __maybe_unused imx8dxl_acm_resume(struct device *dev)
{
struct imx8dxl_acm_priv *priv = dev_get_drvdata(dev);
writel_relaxed(priv->regs[0], priv->reg + 0x000000);
writel_relaxed(priv->regs[1], priv->reg + 0x010000);
writel_relaxed(priv->regs[2], priv->reg + 0x020000);
writel_relaxed(priv->regs[3], priv->reg + 0x030000);
writel_relaxed(priv->regs[14], priv->reg + 0x0E0000);
writel_relaxed(priv->regs[15], priv->reg + 0x0F0000);
writel_relaxed(priv->regs[16], priv->reg + 0x100000);
writel_relaxed(priv->regs[17], priv->reg + 0x110000);
writel_relaxed(priv->regs[26], priv->reg + 0x1A0000);
writel_relaxed(priv->regs[28], priv->reg + 0x1C0000);
return 0;
}
const struct dev_pm_ops imx8dxl_acm_pm_ops = {
SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx8dxl_acm_suspend,
imx8dxl_acm_resume)
};
static int __init imx8qxp_acm_init(void)
static struct platform_driver imx8dxl_acm_clk_driver = {
.driver = {
.name = "imx8dxl-acm",
.of_match_table = imx8dxl_acm_match,
.pm = &imx8dxl_acm_pm_ops,
.suppress_bind_attrs = true,
},
.probe = imx8dxl_acm_clk_probe,
};
static int __init imx8dxl_acm_init(void)
{
return platform_driver_register(&imx8qxp_acm_clk_driver);
return platform_driver_register(&imx8dxl_acm_clk_driver);
}
fs_initcall(imx8qxp_acm_init);
fs_initcall(imx8dxl_acm_init);