arm64: tegra: Add PWM controllers on Tegra194
Tegra194 has eight single-channel PWM controllers, one of them in the AON partition. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -209,6 +209,90 @@
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status = "disabled";
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};
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pwm1: pwm@3280000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0x3280000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM1>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM1>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm2: pwm@3290000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0x3290000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM2>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM2>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm3: pwm@32a0000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0x32a0000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM3>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM3>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm5: pwm@32c0000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0x32c0000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM5>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM5>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm6: pwm@32d0000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0x32d0000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM6>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM6>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm7: pwm@32e0000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0x32e0000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM7>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM7>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pwm8: pwm@32f0000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0x32f0000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM8>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM8>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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sdmmc1: sdhci@3400000 {
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compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
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reg = <0x03400000 0x10000>;
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@ -313,6 +397,18 @@
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status = "disabled";
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};
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pwm4: pwm@c340000 {
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compatible = "nvidia,tegra194-pwm",
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"nvidia,tegra186-pwm";
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reg = <0xc340000 0x10000>;
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clocks = <&bpmp TEGRA194_CLK_PWM4>;
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clock-names = "pwm";
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resets = <&bpmp TEGRA194_RESET_PWM4>;
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reset-names = "pwm";
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status = "disabled";
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#pwm-cells = <2>;
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};
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pmc@c360000 {
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compatible = "nvidia,tegra194-pmc";
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reg = <0x0c360000 0x10000>,
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