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drm/amd/display: DCN2 Engine-specifc encoder allocation

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[WHY]
From DCE110 onward, we have the ability to assign DIG BE and FE
separately for any display connector type; before, we could only do this
for DP.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wesley Chalmers 2019-04-24 15:25:41 -04:00 committed by Alex Deucher
parent b5d71c9396
commit 6936c8b1d4
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
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@ -2446,8 +2446,9 @@ static struct resource_funcs dcn20_res_pool_funcs = {
.set_mcif_arb_params = dcn20_set_mcif_arb_params,
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
.add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource,
.remove_dsc_from_stream_resource = dcn20_remove_dsc_from_stream_resource
.remove_dsc_from_stream_resource = dcn20_remove_dsc_from_stream_resource,
#endif
.find_first_free_match_stream_enc_for_link = dce110_find_first_free_match_stream_enc_for_link
};
bool dcn20_dwbc_create(struct dc_context *ctx, struct resource_pool *pool)