thermal/drivers/int340x/processor_thermal: Fix tcc setting

commit fe6a6de6692e7f7159c1ff42b07ecd737df712b4 upstream.

The following fixes are done for tcc sysfs interface:
- TCC is 6 bits only from bit 29-24
- TCC of 0 is valid
- When BIT(31) is set, this register is read only
- Check for invalid tcc value
- Error for negative values

Fixes: fdf4f2fb8e ("drivers: thermal: processor_thermal_device: Export sysfs interface for TCC offset")
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: stable@vger.kernel.org
Acked-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210628215803.75038-1-srinivas.pandruvada@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Srinivas Pandruvada 2021-06-28 14:58:03 -07:00 committed by Greg Kroah-Hartman
parent ec170de13b
commit 5e4aae9e3e
1 changed files with 12 additions and 8 deletions

View File

@ -150,24 +150,27 @@ static ssize_t tcc_offset_degree_celsius_show(struct device *dev,
if (err)
return err;
val = (val >> 24) & 0xff;
val = (val >> 24) & 0x3f;
return sprintf(buf, "%d\n", (int)val);
}
static int tcc_offset_update(int tcc)
static int tcc_offset_update(unsigned int tcc)
{
u64 val;
int err;
if (!tcc)
if (tcc > 63)
return -EINVAL;
err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val);
if (err)
return err;
val &= ~GENMASK_ULL(31, 24);
val |= (tcc & 0xff) << 24;
if (val & BIT(31))
return -EPERM;
val &= ~GENMASK_ULL(29, 24);
val |= (tcc & 0x3f) << 24;
err = wrmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, val);
if (err)
@ -176,14 +179,15 @@ static int tcc_offset_update(int tcc)
return 0;
}
static int tcc_offset_save;
static unsigned int tcc_offset_save;
static ssize_t tcc_offset_degree_celsius_store(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
unsigned int tcc;
u64 val;
int tcc, err;
int err;
err = rdmsrl_safe(MSR_PLATFORM_INFO, &val);
if (err)
@ -192,7 +196,7 @@ static ssize_t tcc_offset_degree_celsius_store(struct device *dev,
if (!(val & BIT(30)))
return -EACCES;
if (kstrtoint(buf, 0, &tcc))
if (kstrtouint(buf, 0, &tcc))
return -EINVAL;
err = tcc_offset_update(tcc);