brain-hackers_pepepper-mirror/linux-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/linux-brain.git synced 2024-06-09 15:26:21 +09:00
Code Issues Projects Releases Wiki Activity

ARM: dts: meson8b: odroidc1: add the CPU voltage regulator

Browse Source 
The CPU voltage regulator is a "Monolithic Power Systems MP2161"
(according to the Odroid-C1+'s schematics). It is driven by PWM_C on
GPIODV_9.

Hardkernel's 3.10 kernel (based on the Amlogic GPL kernel sources)
defines a PWM voltage table with the following values:
- 0.86 volts = PWM register value 0x10f001b
- (more values in 0.1 volt increments)
- 1.14 volts = PWM register value 0x000012a
When using the XTAL (24MHz) as input this translates into a PWM period
of 12218ns with 0.86V using a duty cycle of 91% and 1.14V using a duty
cycle of 0%.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2018-09-13 22:29:16 +02:00 committed by Kevin Hilman
parent bbedc1f1d9
commit 524d96083b
1 changed files with 27 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
arch/arm/boot/dts/meson8b-odroidc1.dts
View File

@ -101,6 +101,25 @@
states = <3300000 0
1800000 1>;
};
vcck: regulator-vcck {
/* Monolithic Power Systems MP2161 */
compatible = "pwm-regulator";
regulator-name = "VCCK";
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;
pwms = <&pwm_cd 0 12218 0>;
pwm-dutycycle-range = <91 0>;
regulator-boot-on;
regulator-always-on;
};
};
&cpu0 {
cpu-supply = <&vcck>;
};
&ethmac {
@ -180,6 +199,14 @@
};
};
&pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_c1_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_XTAL>;
clock-names = "clkin0";
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;