drm/amdgpu: Create helper to clear AMDGPU_GEM_CREATE_CPU_GTT_USWC
Move the logic to clear AMDGPU_GEM_CREATE_CPU_GTT_USWC in amdgpu_bo_do_create into standalone helper so it can be reused in other functions. v4: Switch to return bool. v5: Fix typos. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -413,6 +413,40 @@ fail:
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return false;
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}
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bool amdgpu_bo_support_uswc(u64 bo_flags)
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{
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#ifdef CONFIG_X86_32
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/* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
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* See https://bugs.freedesktop.org/show_bug.cgi?id=84627
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*/
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return false;
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#elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
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/* Don't try to enable write-combining when it can't work, or things
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* may be slow
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* See https://bugs.freedesktop.org/show_bug.cgi?id=88758
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*/
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#ifndef CONFIG_COMPILE_TEST
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#warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
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thanks to write-combining
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#endif
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if (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
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DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
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"better performance thanks to write-combining\n");
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return false;
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#else
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/* For architectures that don't support WC memory,
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* mask out the WC flag from the BO
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*/
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if (!drm_arch_can_wc_memory())
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return false;
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return true;
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#endif
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}
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static int amdgpu_bo_do_create(struct amdgpu_device *adev,
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struct amdgpu_bo_param *bp,
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struct amdgpu_bo **bo_ptr)
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@ -466,33 +500,8 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
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bo->flags = bp->flags;
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#ifdef CONFIG_X86_32
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/* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
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* See https://bugs.freedesktop.org/show_bug.cgi?id=84627
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*/
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bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
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#elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
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/* Don't try to enable write-combining when it can't work, or things
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* may be slow
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* See https://bugs.freedesktop.org/show_bug.cgi?id=88758
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*/
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#ifndef CONFIG_COMPILE_TEST
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#warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
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thanks to write-combining
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#endif
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if (bo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
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DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
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"better performance thanks to write-combining\n");
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bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
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#else
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/* For architectures that don't support WC memory,
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* mask out the WC flag from the BO
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*/
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if (!drm_arch_can_wc_memory())
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if (!amdgpu_bo_support_uswc(bo->flags))
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bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
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#endif
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bo->tbo.bdev = &adev->mman.bdev;
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if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA |
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@ -308,5 +308,7 @@ void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
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struct seq_file *m);
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#endif
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bool amdgpu_bo_support_uswc(u64 bo_flags);
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#endif
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