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arm64: dts: stratix10: add USB ECC reset bit

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The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted
as well for the USB IP to work properly.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Dinh Nguyen 2017-12-13 08:10:31 -06:00
parent 15a9b85d4b
commit 33af8ca0fd
1 changed files with 4 additions and 4 deletions
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8
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
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@ -335,8 +335,8 @@
interrupts = <0 93 4>;
phys = <&usbphy0>;
phy-names = "usb2-phy";
resets = <&rst USB0_RESET>;
reset-names = "dwc2";
resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
reset-names = "dwc2", "dwc2-ecc";
status = "disabled";
};
@ -346,8 +346,8 @@
interrupts = <0 94 4>;
phys = <&usbphy0>;
phy-names = "usb2-phy";
resets = <&rst USB1_RESET>;
reset-names = "dwc2";
resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>;
reset-names = "dwc2", "dwc2-ecc";
status = "disabled";
};