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arm64: dts: meson-axg: enable SCPI
Enable SCPI on the axg platform, with cpu clock and hwmon (core temperature) support Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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@ -79,6 +79,7 @@
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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cpu1: cpu@1 {
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@ -87,6 +88,7 @@
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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cpu2: cpu@2 {
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@ -95,6 +97,7 @@
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reg = <0x0 0x2>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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cpu3: cpu@3 {
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@ -103,6 +106,7 @@
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reg = <0x0 0x3>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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};
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l2: l2-cache0 {
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@ -137,6 +141,28 @@
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};
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};
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scpi {
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compatible = "arm,scpi-pre-1.0";
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mboxes = <&mailbox 1 &mailbox 2>;
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shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
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scpi_clocks: clocks {
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compatible = "arm,scpi-clocks";
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scpi_dvfs: clock-controller {
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compatible = "arm,scpi-dvfs-clocks";
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#clock-cells = <1>;
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clock-indices = <0>;
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clock-output-names = "vcpu";
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};
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};
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scpi_sensors: sensors {
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compatible = "amlogic,meson-gxbb-scpi-sensors";
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#thermal-sensor-cells = <1>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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