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i2c: mlxcpld: Add capability register description to documentation

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It adds capability register description to documentation.

Signed-off-by: Michael Shych <michaelsh@mellanox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Michael Shych 2018-03-27 14:01:26 +00:00 committed by Wolfram Sang
parent ae4aa68dd3
commit 27aaa8ad5a
1 changed files with 4 additions and 0 deletions
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Documentation/i2c/busses/i2c-mlxcpld
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@ -20,6 +20,10 @@ The next transaction types are supported:
- Write Byte/Block.
Registers:
CPBLTY 0x0 - capability reg.
Bits [6:5] - transaction length. b01 - 72B is supported,
36B in other case.
Bit 7 - SMBus block read support.
CTRL 0x1 - control reg.
Resets all the registers.
HALF_CYC 0x4 - cycle reg.