From 257d9bc9b977c7f83f2e47d959bb8690c0f726d2 Mon Sep 17 00:00:00 2001 From: Alex Marginean Date: Fri, 20 Sep 2019 19:37:19 +0300 Subject: [PATCH] drivers: net: phy: aquantia: enable USX AN for USXGMII protocol Depending on FW defaults USX AN in AQR PHY must be explicitly enabled when using USXGMII. Enable it based on interface type. Signed-off-by: Alex Marginean --- drivers/net/phy/aquantia_main.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c index aee4b9025010..73ad3c88f48d 100644 --- a/drivers/net/phy/aquantia_main.c +++ b/drivers/net/phy/aquantia_main.c @@ -33,6 +33,9 @@ #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII 6 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10 +#define MDIO_PHYXS_VEND_PROV2 0xC441 +#define MDIO_PHYXS_VEND_PROV2_USX_AN BIT(3) + #define MDIO_AN_VEND_PROV 0xc400 #define MDIO_AN_VEND_PROV_1000BASET_FULL BIT(15) #define MDIO_AN_VEND_PROV_1000BASET_HALF BIT(14) @@ -310,6 +313,10 @@ static int aqr_config_aneg_set_prot(struct phy_device *phydev) aquantia_syscfg[if_type].syscfg); } + if (if_type == PHY_INTERFACE_MODE_USXGMII) + phy_write_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_PROV2, + MDIO_PHYXS_VEND_PROV2_USX_AN); + /* wake PHY back up */ phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0); mdelay(10);