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https://github.com/brain-hackers/linux-brain.git
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ARM: imx: initial SolidRun HummingBoard support
Add support for the SolidRun HummingBoard. This commit adds support for the following interfaces on this board: - Consumer Ir receiver - S/PDIF output - Both USB interfaces - Gigabit Ethernet using AR8035 - UART port Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
parent
d8ec26d7f8
commit
208d7baf80
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@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx53-mba53.dtb \
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imx53-qsb.dtb \
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imx53-smd.dtb \
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imx6dl-hummingboard.dtb \
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imx6dl-sabreauto.dtb \
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imx6dl-sabresd.dtb \
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imx6dl-wandboard.dtb \
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167
arch/arm/boot/dts/imx6dl-hummingboard.dts
Normal file
167
arch/arm/boot/dts/imx6dl-hummingboard.dts
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@ -0,0 +1,167 @@
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/*
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* Copyright (C) 2013,2014 Russell King
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-microsom.dtsi"
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#include "imx6qdl-microsom-ar8035.dtsi"
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/ {
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model = "SolidRun HummingBoard DL/Solo";
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compatible = "solidrun,hummingboard", "fsl,imx6dl";
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ir_recv: ir-receiver {
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compatible = "gpio-ir-receiver";
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gpios = <&gpio1 2 1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hummingboard_gpio1_2>;
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};
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regulators {
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compatible = "simple-bus";
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reg_3p3v: 3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usbh1_vbus: usb-h1-vbus {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 0 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_usbotg_vbus: usb-otg-vbus {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio3 22 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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};
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codec: spdif-transmitter {
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compatible = "linux,spdif-dit";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hummingboard_spdif>;
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};
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sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-spdif";
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/* IMX6 doesn't implement this yet */
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spdif-controller = <&spdif>;
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spdif-out;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
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/*
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* Not fitted on Carrier-1 board... yet
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status = "okay";
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rtc: pcf8523@68 {
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compatible = "nxp,pcf8523";
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reg = <0x68>;
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};
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*/
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};
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&iomuxc {
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hummingboard {
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pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
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fsl,pins = <
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MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
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MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
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>;
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};
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pinctrl_hummingboard_gpio1_2: hummingboard-gpio1_2 {
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fsl,pins = <
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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>;
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};
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pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_hummingboard_spdif: hummingboard-spdif {
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fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;
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};
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pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
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fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
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};
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pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
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fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
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};
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pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {
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fsl,pins = <
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MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
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>;
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};
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pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
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>;
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};
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};
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};
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&spdif {
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status = "okay";
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};
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&usbh1 {
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vbus-supply = <®_usbh1_vbus>;
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usbotg_vbus>;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <
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&pinctrl_hummingboard_usdhc2_aux
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&pinctrl_hummingboard_usdhc2
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>;
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vmmc-supply = <®_3p3v>;
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cd-gpios = <&gpio1 4 0>;
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status = "okay";
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};
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62
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
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62
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
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@ -0,0 +1,62 @@
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/*
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* Copyright (C) 2013,2014 Russell King
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*
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* This describes the hookup for an AR8035 to the iMX6 on the SolidRun
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* MicroSOM.
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*/
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
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phy-mode = "rgmii";
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phy-reset-duration = <2>;
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phy-reset-gpios = <&gpio4 15 0>;
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status = "okay";
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};
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&iomuxc {
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enet {
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pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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/* AR8035 reset */
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MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
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/* AR8035 interrupt */
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MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
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/* GPIO16 -> AR8035 25MHz */
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
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/* AR8035 pin strapping: IO voltage: pull up */
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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/* AR8035 pin strapping: PHYADDR#0: pull down */
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
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/* AR8035 pin strapping: PHYADDR#1: pull down */
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0
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/* AR8035 pin strapping: MODE#1: pull up */
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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/* AR8035 pin strapping: MODE#3: pull up */
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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/* AR8035 pin strapping: MODE#0: pull down */
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
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/*
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* As the RMII pins are also connected to RGMII
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* so that an AR8030 can be placed, set these
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* to high-z with the same pulls as above.
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* Use the GPIO settings to avoid changing the
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* input select registers.
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*/
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x03000
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MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000
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MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
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>;
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};
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};
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};
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33
arch/arm/boot/dts/imx6qdl-microsom.dtsi
Normal file
33
arch/arm/boot/dts/imx6qdl-microsom.dtsi
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@ -0,0 +1,33 @@
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/*
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* Copyright (C) 2013,2014 Russell King
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*/
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&iomuxc {
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microsom {
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pinctrl_microsom_uart1: microsom-uart1 {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_microsom_usbotg: microsom-usbotg {
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/*
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* Similar to pinctrl_usbotg_2, but we want it
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* pulled down for a fixed host connection.
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*/
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fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_uart1>;
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status = "okay";
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};
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&usbotg {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_usbotg>;
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};
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@ -103,6 +103,39 @@ static int ar8031_phy_fixup(struct phy_device *dev)
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#define PHY_ID_AR8031 0x004dd074
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static int ar8035_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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/* Ar803x phy SmartEEE feature cause link status generates glitch,
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* which cause ethernet link down/up issue, so disable SmartEEE
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*/
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phy_write(dev, 0xd, 0x3);
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phy_write(dev, 0xe, 0x805d);
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phy_write(dev, 0xd, 0x4003);
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val = phy_read(dev, 0xe);
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phy_write(dev, 0xe, val & ~(1 << 8));
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/*
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* Enable 125MHz clock from CLK_25M on the AR8031. This
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* is fed in to the IMX6 on the ENET_REF_CLK (V22) pad.
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* Also, introduce a tx clock delay.
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*
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* This is the same as is the AR8031 fixup.
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*/
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ar8031_phy_fixup(dev);
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/*check phy power*/
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val = phy_read(dev, 0x0);
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if (val & BMCR_PDOWN)
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phy_write(dev, 0x0, val & ~BMCR_PDOWN);
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return 0;
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}
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#define PHY_ID_AR8035 0x004dd072
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static void __init imx6q_enet_phy_init(void)
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{
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if (IS_BUILTIN(CONFIG_PHYLIB)) {
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@ -112,6 +145,8 @@ static void __init imx6q_enet_phy_init(void)
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ksz9031rn_phy_fixup);
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phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
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ar8031_phy_fixup);
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phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
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ar8035_phy_fixup);
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}
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}
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