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ARM: dts: socfpga: add timer resets for SoCFPGA platform

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Add the resets property for all the timers on the Cyclone5/Arria5/Arria10
platforms.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Dinh Nguyen 2018-09-10 09:12:08 -05:00
parent cbbc488ed8
commit 20373e0cb8
2 changed files with 16 additions and 0 deletions
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8
arch/arm/boot/dts/socfpga.dtsi
View File

@ -849,6 +849,8 @@
reg = <0xffc08000 0x1000>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER0_RESET>;
reset-names = "timer";
};
timer1: timer1@ffc09000 {
@ -857,6 +859,8 @@
reg = <0xffc09000 0x1000>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER1_RESET>;
reset-names = "timer";
};
timer2: timer2@ffd00000 {
@ -865,6 +869,8 @@
reg = <0xffd00000 0x1000>;
clocks = <&osc1>;
clock-names = "timer";
resets = <&rst OSC1TIMER0_RESET>;
reset-names = "timer";
};
timer3: timer3@ffd01000 {
@ -873,6 +879,8 @@
reg = <0xffd01000 0x1000>;
clocks = <&osc1>;
clock-names = "timer";
resets = <&rst OSC1TIMER1_RESET>;
reset-names = "timer";
};
uart0: serial0@ffc02000 {

8
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@ -786,6 +786,8 @@
reg = <0xffc02700 0x100>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER0_RESET>;
reset-names = "timer";
};
timer1: timer1@ffc02800 {
@ -794,6 +796,8 @@
reg = <0xffc02800 0x100>;
clocks = <&l4_sp_clk>;
clock-names = "timer";
resets = <&rst SPTIMER1_RESET>;
reset-names = "timer";
};
timer2: timer2@ffd00000 {
@ -802,6 +806,8 @@
reg = <0xffd00000 0x100>;
clocks = <&l4_sys_free_clk>;
clock-names = "timer";
resets = <&rst L4SYSTIMER0_RESET>;
reset-names = "timer";
};
timer3: timer3@ffd00100 {
@ -810,6 +816,8 @@
reg = <0xffd01000 0x100>;
clocks = <&l4_sys_free_clk>;
clock-names = "timer";
resets = <&rst L4SYSTIMER1_RESET>;
reset-names = "timer";
};
uart0: serial0@ffc02000 {